Patents by Inventor Bo-Yi Lin

Bo-Yi Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230002127
    Abstract: A container adapter includes a soft sleeve having a first and a second anti-slide sleeve portion; a rigid connecting pipe having a coupling portion, a stop portion and a plurality of slots. The first anti-slide sleeve portion is forward tapered, and the coupling portion is backward flared. The rigid connecting pipe is connected at the coupling portion to the first anti-slide sleeve portion of the soft sleeve with the stop portion abutted on a rim of the first anti-slide sleeve portion. To use the container adapter, simply fit the second anti-slide sleeve portion of the soft sleeve around an end of a container. Decorative accessories can be set in the slots to form ornaments, or pipes can be connected to the container adapter to form a fluid passage for guiding a liquid in the container, such that the container can have more applications and be advantageous to environmental protection.
    Type: Application
    Filed: July 2, 2021
    Publication date: January 5, 2023
    Inventor: BO-YI LIN
  • Patent number: 7272813
    Abstract: An design architecture for an application specific integrated circuit (ASIC) is disclosed. The design architecture of the ASIC includes a pre-determined number of redundant computational units such that when defective computational units are found during testing, full functionality of the ASIC is maintained by re-mapping functionality from the defective units to the once redundant units. The marking of defective units and the re-mapping of functionality are automated by using self-test logic built into each computational unit in the ASIC. The self-test logic is adapted to allow the corresponding computational unit to self-isolate itself from the data initialization process and to self-disable to avoid any computation when the ASIC is in operation mode. The re-mapping of functionality is achieved by initializing the computational units in the array in a serial manner.
    Type: Grant
    Filed: September 15, 2004
    Date of Patent: September 18, 2007
    Assignee: Omnivision Technologies, Inc.
    Inventor: Bo-Yi Lin
  • Publication number: 20060059450
    Abstract: An design architecture for an application specific integrated circuit (ASIC) is disclosed. The design architecture of the ASIC includes a pre-determined number of redundant computational units such that when defective computational units are found during testing, full functionality of the ASIC is maintained by re-mapping functionality from the defective units to the once redundant units. The marking of defective units and the re-mapping of functionality are automated by using self-test logic built into each computational unit in the ASIC. The self-test logic is adapted to allow the corresponding computational unit to self-isolate itself from the data initialization process and to self-disable to avoid any computation when the ASIC is in operation mode. The re-mapping of functionality is achieved by initializing the computational units in the array in a serial manner.
    Type: Application
    Filed: September 15, 2004
    Publication date: March 16, 2006
    Inventor: Bo-Yi Lin
  • Patent number: D961007
    Type: Grant
    Filed: November 20, 2020
    Date of Patent: August 16, 2022
    Assignee: EDX EDUCATION CO., LTD.
    Inventor: Bo-Yi Lin
  • Patent number: D987732
    Type: Grant
    Filed: November 20, 2020
    Date of Patent: May 30, 2023
    Assignee: EDX EDUCATION CO., LTD.
    Inventor: Bo-Yi Lin
  • Patent number: D987733
    Type: Grant
    Filed: May 10, 2021
    Date of Patent: May 30, 2023
    Assignee: EDX EDUCATION CO., LTD.
    Inventor: Bo-Yi Lin