Patents by Inventor Bob J. Self
Bob J. Self has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7094063Abstract: An interconnect formed using a stiff layer having a plurality of holes extending there through. A first flexible layer is bonded to a first side of the stiff layer. The first flexible layer having a plurality of conductive bumps, each conductive bump being positioned over a hole. A second flexible layer is bonded to a second side of the stiff layer. The second flexible layer having a plurality of conductive bumps, each conductive bump being positioned over a hole. Signal paths are formed in the holes, the signal paths connecting the plurality of conductive bumps on the first layer to the plurality of conductive bumps on the second layer.Type: GrantFiled: April 30, 2004Date of Patent: August 22, 2006Assignee: Agilent Technologies, Inc.Inventors: Bob J. Self, Donald M. Logelin, Robert H. Wardwell
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Patent number: 6864696Abstract: A probe that connects test and measurement equipment to a device under test via a plurality of cables. The probe is formed of a plurality of printed circuit boards that are stacked together. Each board is connected to one of the plurality of cables and has a longitudinal set of pads along an edge electrically connected to the cable. The stacked plurality of printed circuit boards form a two dimensional array of pads for connecting to a similar set of pads on a device under test.Type: GrantFiled: October 31, 2002Date of Patent: March 8, 2005Assignee: Agilent Technologies, Inc.Inventors: Donald M. Logelin, Bob J. Self, Robert H. Wardwell
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Patent number: 6776662Abstract: An adapter for attaching a connector having a plurality of pads for interfacing with a device under test. The adapter comprises a carrier having a plurality of voids formed therein in a pattern matching connections on the connector, said voids traversing from a first surface to a second surface of the carrier. At least one electrical component is embedded in at least one void, the at least one electrical component forms a first adapter pad on the first surface of the carrier and a second adapter pad on the second surface of the carrier. When the adapter is interposed between the connector and the device under test the electrical component becomes part of the circuit of the device under test and the connector.Type: GrantFiled: September 27, 2002Date of Patent: August 17, 2004Assignee: Agilent Technologies, Inc.Inventors: Bob J. Self, Robert H. Wardwell
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Patent number: 6768328Abstract: One or more termination circuits or networks having compensation properties that are operative to reduce reflections occurring between a probe utilized by a test and measurement analyzer to test a device under test (DUT), such as an integrated circuit device, and the device under test itself are employed. The termination circuits are preferably small and less obtrusive than larger connectors and their compensation networking compensates for the connection of the probe to the DUT as well as connection of the cable from the probe to the analyzer performing the test and measurement function. The functionality of the termination circuits may be located at the DUT in a termination network connector or within the structure of the probe itself.Type: GrantFiled: October 9, 2002Date of Patent: July 27, 2004Assignee: Agilent Technologies, Inc.Inventors: Bob J. Self, Kevin M Hall
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Patent number: 6735082Abstract: A tandem heat sink operable to provide heat dissipation to one or more electronic components. The tandem heat sink apparatus creates air turbulence within the air stream across the one or more components through the use of pins oriented at more than one angle with respect to the base of the tandem heat sink. An airflow across one or more electronic components is disrupted by the geometry of the different pin angles of the tandem heat sink, thereby creating turbulence which increases the efficiency of the heat sink and prevents thermal shading from occurring. When the heat sink is placed on a single component, the heat sink may be situated without any overhang relative to the component due to the turbulence induced by the different pin angles and the resulting increase in heat dissipation efficiency.Type: GrantFiled: August 14, 2002Date of Patent: May 11, 2004Assignee: Agilent Technologies, Inc.Inventor: Bob J. Self
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Publication number: 20040085081Abstract: A probe that connects test and measurement equipment to a device under test via a plurality of cables. The probe is formed of a plurality of printed circuit boards that are stacked together. Each board is connected to one of the plurality of cables and has a longitudinal set of pads along an edge electrically connected to the cable. The stacked plurality of printed circuit boards form a two dimensional array of pads for connecting to a similar set of pads on a device under test.Type: ApplicationFiled: October 31, 2002Publication date: May 6, 2004Inventors: Donald M. Logelin, Bob J. Self, Robert H. Wardwell
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Publication number: 20040070411Abstract: One or more termination circuits or networks having compensation properties that are operative to reduce reflections occurring between a probe utilized by a test and measurement analyzer to test a device under test (DUT), such as an integrated circuit device, and the device under test itself are employed. The termination circuits are preferably small and less obtrusive than larger connectors and their compensation networking compensates for the connection of the probe to the DUT as well as connection of the cable from the probe to the analyzer performing the test and measurement function. The functionality of the termination circuits may be located at the DUT in a termination network connector or within the structure of the probe itself.Type: ApplicationFiled: October 9, 2002Publication date: April 15, 2004Inventors: Bob J. Self, Kevin M. Hall
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Publication number: 20040063356Abstract: An adapter for attaching a connector having a plurality of pads for interfacing with a device under test. The adapter comprises a carrier having a plurality of voids formed therein in a pattern matching connections on the connector, said voids traversing from a first surface to a second surface of the carrier. At least one electrical component is embedded in at least one void, the at least one electrical component forms a first adapter pad on the first surface of the carrier and a second adapter pad on the second surface of the carrier. When the adapter is interposed between the connector and the device under test the electrical component becomes part of the circuit of the device under test and the connector.Type: ApplicationFiled: September 27, 2002Publication date: April 1, 2004Inventors: Bob J. Self, Robert H. Wardwell
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Publication number: 20040063342Abstract: An adapter for attaching a connector having a plurality of pads to a device under test. The adapter is comprised of two types of parts a carrier cradle and at least one circuit substrate. The circuit substrate has plurality of pads formed on a first and second edge. A plurality of circuits are formed on a first side of the circuit substrate, each circuit connecting a pad on the first edge of the circuit substrate to a pad on the second edge of the circuit substrate. The circuit substrate is supported by the carrier cradle such that the pads on the first edge of the circuit substrate align with the first side of the carrier cradle and the pads on the second edge of the circuit substrate align with the second side of the circuit substrate, whereby when the adapter is interposed between the connector and the device under test the circuits electrically connect the device under test to the connector.Type: ApplicationFiled: September 27, 2002Publication date: April 1, 2004Inventors: Bob J. Self, Robert H. Wardwell
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Patent number: 6712622Abstract: An adapter for attaching a connector having a plurality of pads to a device under test. The adapter is comprised of two types of parts a carrier cradle and at least one circuit substrate. The circuit substrate has plurality of pads formed on a first and second edge. A plurality of circuits are formed on a first side of the circuit substrate, each circuit connecting a pad on the first edge of the circuit substrate to a pad on the second edge of the circuit substrate. The circuit substrate is supported by the carrier cradle such that the pads on the first edge of the circuit substrate align with the first side of the carrier cradle and the pads on the second edge of the circuit substrate align with the second side of the circuit substrate, whereby when the adapter is interposed between the connector and the device under test the circuits electrically connect the device under test to the connector.Type: GrantFiled: September 27, 2002Date of Patent: March 30, 2004Assignee: Agilent Technologies, Inc.Inventors: Bob J. Self, Robert H. Wardwell
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Publication number: 20040043640Abstract: An interconnect having a stiff layer, such as a PCB, having a plurality of holes therein. A first flexible layer is bonded to a first side of the stiff layer, the first flexible layer having a plurality of conductive bumps thereon positioned over holes. A second flexible layer is bonded to a second side of the stiff layer, the second flexible layer having a plurality of conductive bumps thereon positioned over holes. Vias connect the plurality of conductive bumps on the first layer to the plurality of conductive bumps on the second layer.Type: ApplicationFiled: August 30, 2002Publication date: March 4, 2004Inventors: Bob J. Self, Donald M. Logelin, Robert H. Wardwell
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Publication number: 20040032718Abstract: A tandem heat sink operable to provide heat dissipation to one or more electronic components. The tandem heat sink apparatus creates air turbulence within the air stream across the one or more components through the use of pins oriented at more than one angle with respect to the base of the tandem heat sink. An airflow across one or more electronic components is disrupted by the geometry of the different pin angles of the tandem heat sink, thereby creating turbulence which increases the efficiency of the heat sink and prevents thermal shading from occurring. When the heat sink is placed on a single component, the heat sink may be situated without any overhang relative to the component due to the turbulence induced by the different pin angles and the resulting increase in heat dissipation efficiency.Type: ApplicationFiled: August 14, 2002Publication date: February 19, 2004Inventor: Bob J. Self
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Patent number: 5859538Abstract: A probe assembly provides the capability to test integrated circuit (IC) packages mounted onto ball grid arrays. The probe assembly comprises a ball grid probe having connectors mounted onto opposite sides of a circuit board. A first BGA header is mounted to one side of the probe while a first BGA socket is mounted to the other side of the probe. The socket is adapted to receive an integrated circuit which is mounted onto a second BGA header. A second BGA socket is mounted to a printed circuit board and is adapted to receive the ball grid probe via the first BGA header. An interconnection device is provided to electrically couple the ball grid probe to a number of test instruments.Type: GrantFiled: January 31, 1996Date of Patent: January 12, 1999Assignee: Hewlett-Packard CompanyInventor: Bob J. Self