Patents by Inventor Bob Roohparvar
Bob Roohparvar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20190115630Abstract: Battery life extending devices include a voltage boosting circuit that generates a boosted voltage from an insufficiently high battery output voltage. A voltage boosting circuit can employ voltage bypass to output the battery voltage when the battery outputs a sufficiently high voltage for the operation of a battery powered device. A voltage boosting circuit can reduce output voltage in response to reduced input voltage from the battery.Type: ApplicationFiled: March 31, 2017Publication date: April 18, 2019Applicant: Batteroo, Inc.Inventors: Fariborz Frankie Roohparvar, Farzan Bob Roohparvar
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Patent number: 10008872Abstract: Methods for extending the life of a battery output regulated voltages from output terminals configured to interface with input terminals of battery powered devices. A method includes receiving a battery electrical power output from the battery. The voltage output by the battery decreases from a battery first output voltage to a battery second output voltage during use of the battery. The electrical power output is used to drive a converter that outputs a converter electrical power having a converter output voltage greater than the battery second output voltage. The converter electrical power is output from output terminals configured to interface with input terminals of a battery powered device. The converter is configured and supported relative to the battery to interface with one or more output terminals of the battery.Type: GrantFiled: November 3, 2014Date of Patent: June 26, 2018Assignee: Batteroo, Inc.Inventors: Fariborz Frankie Roohparvar, Farzan Bob Roohparvar
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Publication number: 20150056476Abstract: Methods for extending the life of a battery output regulated voltages from output terminals configured to interface with input terminals of battery powered devices. A method includes receiving a battery electrical power output from the battery. The voltage output by the battery decreases from a battery first output voltage to a battery second output voltage during use of the battery. The electrical power output is used to drive a converter that outputs a converter electrical power having a converter output voltage greater than the battery second output voltage. The converter electrical power is output from output terminals configured to interface with input terminals of a battery powered device. The converter is configured and supported relative to the battery to interface with one or more output terminals of the battery.Type: ApplicationFiled: October 31, 2014Publication date: February 26, 2015Inventors: Fariborz Frankie Roohparvar, Farzan Bob Roohparvar
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Publication number: 20150048785Abstract: Methods for extending the life of a battery output regulated voltages from output terminals configured to interface with input terminals of battery powered devices. A method includes receiving a battery electrical power output from the battery. The voltage output by the battery decreases from a battery first output voltage to a battery second output voltage during use of the battery. The electrical power output is used to drive a converter that outputs a converter electrical power having a converter output voltage greater than the battery second output voltage. The converter electrical power is output from output terminals configured to interface with input terminals of a battery powered device. The converter is configured and supported relative to the battery to interface with one or more output terminals of the battery.Type: ApplicationFiled: November 3, 2014Publication date: February 19, 2015Inventors: Fariborz Frankie Roohparvar, Farzan Bob Roohparvar
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Patent number: 7978489Abstract: A power supply adapter is provided. The power supply adapter includes a power converter circuit configured to generate a regulated voltage signal. The power converter circuit includes a rectifier coupled with AC power blades. A regulator circuit is coupled with the rectifier. A transformer is coupled with the regulator circuit. The transformer includes a primary and a secondary. The transformer is coupled with the regulator circuit via the primary. An output circuit is coupled with the secondary of the transformer. The output circuit includes an output capacitor. A flexible contact is coupled with each of a first and a second printed circuit board and flexibly biased to couple with a proximate end of the AC power blades. The adapter includes an EMI shield substantially surrounding a connector receptacle. The power converter circuit can include a forward or a flyback power converter. The transformer can include a planar format transformer coupled with the first or the second PCB.Type: GrantFiled: August 4, 2008Date of Patent: July 12, 2011Assignee: Flextronics AP, LLCInventors: Mark Telefus, Bahman Sharifipour, Rowell Gapuz, Richard Sy, HongWei Du, Bob Roohparvar
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Patent number: 7830676Abstract: A power supply apparatus and method of regulating is provided. A converter circuit includes a primary switching element and an auxiliary switching element. The auxiliary switching element is for transferring a reflected voltage signal. A transformer includes a primary and a secondary, the primary is coupled with the converter circuit. The primary and the secondary each comprise a single winding. An output rectifier circuit is coupled with the secondary of the transformer. A resonant circuit is included in the converter circuit and is coupled with the primary. The resonant circuit includes one or more resonance capacitors that are configured for providing a transformer resonance. The transformer resonance comprises the reflected voltage signal, the capacitance of the one or more resonance capacitors and a parasitic capacitance of the transformer. The reflected voltage signal is reflected from the secondary to the primary. A current feedback circuit is coupled between the primary and a controller.Type: GrantFiled: March 27, 2008Date of Patent: November 9, 2010Assignee: Flextronics AP, LLCInventors: Mark Telefus, Farza Bob Roohparvar
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Patent number: 7755914Abstract: A power supply apparatus and method of regulating is provided. A converter circuit includes a primary switching element and an auxiliary switching element. The auxiliary switching element is for transferring a reflected voltage signal. A transformer includes a primary and a secondary, the primary is coupled with the converter circuit. The primary and secondary each include a single winding. An output rectifier circuit is coupled with the secondary of the transformer. A resonant circuit is included in the converter circuit and is coupled with the primary. The resonant circuit includes one or more resonance capacitors that are configured for providing a transformer resonance. The transformer resonance comprises the reflected voltage signal, the capacitance of the one or more resonance capacitors and a parasitic capacitance of the transformer. The reflected voltage signal is reflected from the secondary to the primary.Type: GrantFiled: March 27, 2008Date of Patent: July 13, 2010Assignee: Flextronics AP, LLCInventors: Mark Telefus, Farza Bob Roohparvar
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Publication number: 20080238379Abstract: A power supply apparatus and method of regulating is provided. A converter circuit includes a primary switching element and an auxiliary switching element. The auxiliary switching element is for transferring a reflected voltage signal. A transformer includes a primary and a secondary, the primary is coupled with the converter circuit. The primary and secondary each include a single winding. An output rectifier circuit is coupled with the secondary of the transformer. A resonant circuit is included in the converter circuit and is coupled with the primary. The resonant circuit includes one or more resonance capacitors that are configured for providing a transformer resonance. The transformer resonance comprises the reflected voltage signal, the capacitance of the one or more resonance capacitors and a parasitic capacitance of the transformer. The reflected voltage signal is reflected from the secondary to the primary.Type: ApplicationFiled: March 27, 2008Publication date: October 2, 2008Inventors: Mark Telefus, Farza Bob Roohparvar
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Publication number: 20080239760Abstract: A power supply apparatus and method of regulating is provided. A converter circuit includes a primary switching element and an auxiliary switching element. The auxiliary switching element is for transferring a reflected voltage signal. A transformer includes a primary and a secondary, the primary is coupled with the converter circuit. The primary and the secondary each comprise a single winding. An output rectifier circuit is coupled with the secondary of the transformer. A resonant circuit is included in the converter circuit and is coupled with the primary. The resonant circuit includes one or more resonance capacitors that are configured for providing a transformer resonance. The transformer resonance comprises the reflected voltage signal, the capacitance of the one or more resonance capacitors and a parasitic capacitance of the transformer. The reflected voltage signal is reflected from the secondary to the primary. A current feedback circuit is coupled between the primary and a controller.Type: ApplicationFiled: March 27, 2008Publication date: October 2, 2008Inventors: Mark Telefus, Farza Bob Roohparvar
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Patent number: 6633494Abstract: A charge pump system, including a charge pump and associated distributed clock generation circuitry, is provided for generating high voltages from a low initial voltage in applications such as erasing and programming electrically erasable programmable read only memory (EEPROM) arrays. The charge pump system uses a power supply voltage and a clock and includes a first phase bootstrapping circuit, an inverter, and a second phase bootstrapping circuit, and a two-stage charge pump. The two phase bootstrapping circuits are both responsive to the clock and use a distributed bootstrapping scheme to provide first and second phase clock signals with fixed multiples of the power supply voltage in order to overcome increased effective transistor threshold voltages, increase efficiency, and allow for charge boosting in a limited number of stages. The inverter is connected to the second phase bootstrapping circuit, causing the second phase clock signal to be opposite in phase from the first clock signal.Type: GrantFiled: October 25, 2001Date of Patent: October 14, 2003Assignee: Fairchild Semiconductor CorporationInventors: Bob Roohparvar, Kevin Z. Mahouti, Karl Rapp
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Patent number: 6522559Abstract: A charge pump system and associated variable-amplitude clock generation circuitry are provided for generating high voltages from a low initial voltage in applications such as erasing and programming electrically erasable programmable read only memory (EEPROM) arrays. The charge pump system uses a power supply voltage and a clock and includes a first phase bootstrapping circuit, an inverter, and a second phase bootstrapping circuit, and charge pump circuitry. The two phase bootstrapping circuits are both responsive to the clock and provide first and second phase clock signals. The inverter is connected to the second phase bootstrapping circuit, causing the second phase clock signal to be opposite in phase from the first clock signal. The charge pump circuitry is responsive to the power supply voltage and the first and second phase clocks and uses native transistors that have lower threshold voltages.Type: GrantFiled: October 25, 2001Date of Patent: February 18, 2003Assignee: Fairchild Semiconductor CorporationInventors: Bob Roohparvar, K. Z. Mahouti, Karl Rapp
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Patent number: 6385065Abstract: A charge pump system, including a charge pump and associated distributed clock generation circuitry, is provided for generating high voltages from a low initial voltage in applications such as erasing and programming electrically erasable programmable read only memory (EEPROM) arrays. The charge pump system uses a power supply voltage and a clock and includes a first phase bootstrapping circuit, an inverter, and a second phase bootstrapping circuit, and a two-stage charge pump. The two phase bootstrapping circuits are both responsive to the clock and use a distributed bootstrapping scheme to provide first and second phase clock signals with fixed multiples of the power supply voltage in order to overcome increased effective transistor threshold voltages, increase efficiency, and allow for charge boosting in a limited number of stages. The inverter is connected to the second phase bootstrapping circuit, causing the second phase clock signal to be opposite in phase from the first clock signal.Type: GrantFiled: September 14, 2000Date of Patent: May 7, 2002Assignee: Fairchild Semiconductor CorporationInventors: Bob Roohparvar, K. Z. Mahouti, Karl Rapp
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Publication number: 20020041503Abstract: A charge pump system, including a charge pump and associated distributed clock generation circuitry, is provided for generating high voltages from a low initial voltage in applications such as erasing and programming electrically erasable programmable read only memory (EEPROM) arrays. The charge pump system uses a power supply voltage and a clock and includes a first phase bootstrapping circuit, an inverter, and a second phase bootstrapping circuit, and a two-stage charge pump. The two phase bootstrapping circuits are both responsive to the clock and use a distributed bootstrapping scheme to provide first and second phase clock signals with fixed multiples of the power supply voltage in order to overcome increased effective transistor threshold voltages, increase efficiency, and allow for charge boosting in a limited number of stages. The inverter is connected to the second phase bootstrapping circuit, causing the second phase clock signal to be opposite in phase from the first clock signal.Type: ApplicationFiled: October 25, 2001Publication date: April 11, 2002Inventors: Bob Roohparvar, K. Z. Mahouti, Karl Rapp
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Publication number: 20020039301Abstract: A charge pump system and associated variable-amplitude clock generation circuitry are provided for generating high voltages from a low initial voltage in applications such as erasing and programming electrically erasable programmable read only memory (EEPROM) arrays. The charge pump system uses a power supply voltage and a clock and includes a first phase bootstrapping circuit, an inverter, and a second phase bootstrapping circuit, and charge pump circuitry. The two phase bootstrapping circuits are both responsive to the clock and provide first and second phase clock signals. The inverter is connected to the second phase bootstrapping circuit, causing the second phase clock signal to be opposite in phase from the first clock signal. The charge pump circuitry is responsive to the power supply voltage and the first and second phase clocks and uses native transistors that have lower threshold voltages.Type: ApplicationFiled: October 25, 2001Publication date: April 4, 2002Inventors: Bob Roohparvar, K. Z. Mahouti, Karl Rapp
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Patent number: 6356469Abstract: A charge pump system and associated variable-amplitude clock generation circuitry are provided for generating high voltages from a low initial voltage in applications such as erasing and programming electrically erasable programmable read only memory (EEPROM) arrays. The charge pump system uses a power supply voltage and a clock and includes a first phase bootstrapping circuit, an inverter, and a second phase bootstrapping circuit, and charge pump circuitry. The two phase bootstrapping circuits are both responsive to the clock and provide first and second phase clock signals. The inverter is connected to the second phase bootstrapping circuit, causing the second phase clock signal to be opposite in phase from the first clock signal. The charge pump circuitry is responsive to the power supply voltage and the first and second phase clocks and uses native transistors that have lower threshold voltages.Type: GrantFiled: September 14, 2000Date of Patent: March 12, 2002Assignee: Fairchild Semiconductor CorporationInventors: Bob Roohparvar, K. Z. Mahouti, Karl Rapp