Abstract: A design, layout, schematic, netlist, abstract or other equivalent circuit representations for a memory that may have redundant circuitry may be generated from a set of user inputs acquired through a graphical user interface. Based on the user inputs one or more leaf cells is/are generated. Then using the leaf cells, a design database for the layout is generated from the user inputs. The design database reflects physical hierarchies of the layout and may include redundancy circuitry within a data and/or address path, parallel to a non-redundant data and/or address path within the layout. The above-mentioned parameters described by the user inputs may include an array size, a defect rate, and/or a leaf cell design, layout or schematic. This scheme may be embodied as a set of computer-readable instructions, for example to be executed by a computer system.