Patents by Inventor Bog Kyou Lee

Bog Kyou Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6528353
    Abstract: Chip stack type semiconductor package and method for fabricating the same, the package including a lower chip having a center pad formation surface defined at a bottom thereof, an upper chip stacked on the lower chip by being adhered to a top surface of the lower chip having no center pad formed thereon and having a center pad formation surface defined at a top surface thereof, both surface adhesive insulating tapes attached on regions spaced from, and positioned left and right sides of respective center pads formed in the center pad formation surfaces of the lower chip and the upper chip, leads having inner lead portions inside of a molded body of an encapsulation resin and outer lead portions exposed outside of the molded body and both end portions of the leads attached to the both surface adhesive insulating tapes attached on left and right sides of the center pads of the upper chip and to the both surface adhesive insulating tapes attached on left and right sides of the center pads of the lower chip oppos
    Type: Grant
    Filed: December 4, 2000
    Date of Patent: March 4, 2003
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventors: Hee Joong Suh, Bog Kyou Lee
  • Publication number: 20010000053
    Abstract: Chip stack type semiconductor package and method for fabricating the same, the package including a lower chip having a center pad formation surface defined at a bottom thereof, an upper chip stacked on the lower chip by being adhered to a top surface of the lower chip having no center pad formed thereon and having a center pad formation surface defined at a top surface thereof, both surface adhesive insulating tapes attached on regions spaced from, and positioned left and right sides of respective center pads formed in the center pad formation surfaces of the lower chip and the upper chip, leads having inner lead portions inside of a molded body of an encapsulation resin and outer lead portions exposed outside of the molded body and both end portions of the leads attached to the both surface adhesive insulating tapes attached on left and right sides of the center pads of the upper chip and to the both surface adhesive insulating tapes attached on left and right sides of the center pads of the lower chip oppos
    Type: Application
    Filed: December 4, 2000
    Publication date: March 22, 2001
    Inventors: Hee Joong Suh, Bog Kyou Lee
  • Patent number: 6177721
    Abstract: Chip stack type semiconductor package and method for fabricating the same, the package including a lower chip having a center pad formation surface defined at a bottom thereof, an upper chip stacked on the lower chip by being adhered to a top surface of the lower chip having no center pad formed thereon and having a center pad formation surface defined at a top surface thereof, both surface adhesive insulating tapes attached on regions spaced from, and positioned left and right sides of respective center pads formed in the center pad formation surfaces of the lower chip and the upper chip, leads having inner lead portions inside of a molded body of an encapsulation resin and outer lead portions exposed outside of the molded body and both end portions of the leads attached to the both surface adhesive insulating tapes attached on left and right sides of the center pads of the upper chip and to the both surface adhesive insulating tapes attached on left and right sides of the center pads of the lower chip oppos
    Type: Grant
    Filed: October 20, 1999
    Date of Patent: January 23, 2001
    Assignee: Hyundai Electronics Industries Co., LTD
    Inventors: Hee Joong Suh, Bog Kyou Lee