Patents by Inventor Bogdan F. Ditu

Bogdan F. Ditu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Optimization method for compiler, optimizer for a compiler and storage medium storing optimizing code
    Patent number: 9098298
    Abstract: The invention pertains to an optimization method for a compiler, comprising providing a model of inter-operand constraints of physical registers of a target-platform of a compilation; and a) providing an intermediate representation of a source code using virtual registers; b) grouping the virtual registers of the intermediate representation based on the model of inter-operand constraints into two or more groups, each group comprising at least one virtual register; c) if for at least one group at least one interference of virtual registers within the group occurs, amending the intermediate representation to resolve at least one interference and jumping to step b); otherwise d) providing a representation of a group interference graph of interferences between the groups; and e) allocating virtual registers to physical registers using a coloring scheme on the representation of the group interference graph.
    Type: Grant
    Filed: August 26, 2010
    Date of Patent: August 4, 2015
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Bogdan F. Ditu, Dragos Badea
  • OPTIMIZATION METHOD FOR COMPILER, OPTIMIZER FOR A COMPILER AND STORAGE MEDIUM STORING OPTIMIZING CODE
    Publication number: 20130139135
    Abstract: The invention pertains to an optimization method for a compiler, comprising providing a model of inter-operand constraints of physical registers of a target-platform of a compilation; and a) providing an intermediate representation of a source code using virtual registers; b) grouping the virtual registers of the intermediate representation based on the model of inter-operand constraints into two or more groups, each group comprising at least one virtual register; c) if for at least one group at least one interference of virtual registers within the group occurs, amending the intermediate representation to resolve at least one interference and jumping to step b); otherwise d) providing a representation of a group interference graph of interferences between the groups; and e) allocating virtual registers to physical registers using a coloring scheme on the representation of the group interference graph.
    Type: Application
    Filed: August 26, 2010
    Publication date: May 30, 2013
    Applicant: Freescale Semiconductor ,Inc.
    Inventors: Bogdan F. Ditu, Dragos Badea