Abstract: Embodiments of the present disclosure are directed towards a mold chase for integrated circuit package assembly and associated techniques and configurations. In one embodiment, a method includes receiving a package substrate, the package substrate including a first die mounted on the package substrate by a plurality of first interconnect structures, and a plurality of second interconnect structures disposed on the package substrate and to route electrical signals of a second die, protecting a top surface of individual interconnect structures of the plurality of second interconnect structures from deposition of a mold material, and depositing the mold material on the package substrate between the individual interconnect structures of the plurality of second interconnect structures. Other embodiments may be described and/or claimed.

Abstract: Embodiments of the present disclosure are directed towards a mold chase for integrated circuit package assembly and associated techniques and configurations. In one embodiment, a method includes receiving a package substrate, the package substrate including a first die mounted on the package substrate by a plurality of first interconnect structures, and a plurality of second interconnect structures disposed on the package substrate and to route electrical signals of a second die, protecting a top surface of individual interconnect structures of the plurality of second interconnect structures from deposition of a mold material, and depositing the mold material on the package substrate between the individual interconnect structures of the plurality of second interconnect structures. Other embodiments may be described and/or claimed.

Abstract: Embodiments of the present disclosure are directed towards a mold chase for integrated circuit package assembly and associated techniques and configurations. In one embodiment, a method includes receiving a package substrate, the package substrate including a first die mounted on the package substrate by a plurality of first interconnect structures, and a plurality of second interconnect structures disposed on the package substrate and configured to route electrical signals of a second die, protecting a top surface of individual interconnect structures of the plurality of second interconnect structures from deposition of a mold material, and depositing the mold material on the package substrate between the individual interconnect structures of the plurality of second interconnect structures. Other embodiments may be described and/or claimed.

Abstract: Embodiments of the present disclosure are directed towards a mold chase for integrated circuit package assembly and associated techniques and configurations. In one embodiment, a method includes receiving a package substrate, the package substrate including a first die mounted on the package substrate by a plurality of first interconnect structures, and a plurality of second interconnect structures disposed on the package substrate and configured to route electrical signals of a second die, protecting a top surface of individual interconnect structures of the plurality of second interconnect structures from deposition of a mold material, and depositing the mold material on the package substrate between the individual interconnect structures of the plurality of second interconnect structures. Other embodiments may be described and/or claimed.

Abstract: The present disclosure relate to the field of depositing an underfill material between a microelectronic die and a substrate for flip-chip packages with an underfill material dispenser. In at least one embodiment, an underfill material dispenser may include a heater having a plurality of conduits. Other embodiments of the present disclosure may further include multiple dispense needle configurations, angled dispense nozzle exit conduits, conical nozzle exit conduits, and satellite traps.

Abstract: The present disclosure relate to the field of depositing an underfill material between a microelectronic die and a substrate for flip-chip packages. In at least one embodiment, differential pressure is used to meter the underfill material during the underfill deposition process.

Abstract: The formation of electronic assemblies including a heat spreader coupled to a die through a thermal interface material formed from an indium preform, is described. One embodiment relates to a method including providing a preform comprising indium, the preform including an indium oxide layer thereon. The method also includes exposing the preform to fluorine so that part of the indium oxide layer is transformed into an indium oxy-fluoride. The method may also include, after the exposing the preform to fluorine so that part of the indium oxide layer is transformed into an indium oxy-fluoride, positioning the preform between a die and a heat sink, and applying pressure to and heating the preform positioned between the die and the heat sink so that reflow occurs and a bond is formed between the die and the heat sink.

Abstract: The present disclosure relate to the field of depositing an underfill material between a microelectronic die and a substrate for flip-chip packages. In at least one embodiment, differential pressure is used to meter the underfill material during the underfill deposition process.

Abstract: The present disclosure relate to the field of depositing an underfill material between a microelectronic die and a substrate for flip-chip packages with an underfill material dispenser. In at least one embodiment, an underfill material dispenser may include a heater having a plurality of conduits. Other embodiments of the present disclosure may further include multiple dispense needle configurations, angled dispense nozzle exit conduits, conical nozzle exit conduits, and satellite traps.

Abstract: The formation of electronic assemblies including a heat spreader coupled to a die through a thermal interface material formed from an indium preform, is described. One embodiment relates to a method including providing a preform comprising indium, the preform including an indium oxide layer thereon. The method also includes exposing the preform to fluorine so that part of the indium oxide layer is transformed into an indium oxy-fluoride. The method may also include, after the exposing the preform to fluorine so that part of the indium oxide layer is transformed into an indium oxy-fluoride, positioning the preform between a die and a heat sink, and applying pressure to and heating the preform positioned between the die and the heat sink so that reflow occurs and a bond is formed between the die and the heat sink.

Abstract: The formation of electronic assemblies including a heat spreader coupled to a die through a thermal interface material formed from an indium preform, is described. One embodiment relates to a method including providing a preform comprising indium, the preform including an indium oxide layer thereon. The method also includes exposing the preform to fluorine so that part of the indium oxide layer is transformed into an indium oxy-fluoride. The method may also include, after the exposing the preform to fluorine so that part of the indium oxide layer is transformed into an indium oxy-fluoride, positioning the preform between a die and a heat sink, and applying pressure to and heating the preform positioned between the die and the heat sink so that reflow occurs and a bond is formed between the die and the heat sink.

Abstract: The formation of electronic assemblies including a heat spreader coupled to a die through a thermal interface material formed from an indium preform, is described. One embodiment relates to a method including providing a preform comprising indium, the preform including an indium oxide layer thereon. The method also includes exposing the preform to fluorine so that part of the indium oxide layer is transformed into an indium oxy-fluoride. The method may also include, after the exposing the preform to fluorine so that part of the indium oxide layer is transformed into an indium oxy-fluoride, positioning the preform between a die and a heat sink, and applying pressure to and heating the preform positioned between the die and the heat sink so that reflow occurs and a bond is formed between the die and the heat sink.

Abstract: Magnetoresistive (MR) sensors have leads that overlap a MR structure and distribute current to the MR structure so that the current is not concentrated in small portions of the leads. An electrically resistive capping layer can be formed between the leads and the MR structure to distribute the current. The leads can include resistive layers and conductive layers, the resistive layers having a thickness-to-resistivity ratio that is greater than that of each of the conductive layers. The resistive layers may protect the conductive layers during MR structure etching, so that the leads have broad layers of electrically conductive material for connection to MR structures. The broad leads conduct heat better than the read gap material that they replace, further reducing the temperature at the connection between the leads and the MR structure.

Abstract: Bias layers for a magnetoresistive (MR) sensor have an in-plane easy axis of magnetization for providing a longitudinal bias to MR layers. The bias layers include cobalt (Co), and are formed on various underlayers having crystalline structures that encourage an in-plane alignment of the C-axis of that Co. Preferred underlayers include nickel aluminum (NiAl) and magnesium oxide (MgO), and an interlayer containing chromium (Cr) may be interposed between a bias layer and an underlayer.