Abstract: A method for allocating resources of a field-programmable gate array (FPGA), the method comprising: deterministically estimating a maximum latency for executing a network service at the FPGA; determining that the maximum latency is less than a threshold latency value associated with the network service; outputting an acknowledgement indicating that the maximum latency is less than or equal to the threshold latency value; receiving confirmation that the FPGA has been selected to execute the network service within a threshold time period; and deterministically scheduling the resources of the FPGA for executing the network service in response to receiving the confirmation within the threshold time period.

Abstract: A device includes a transceiver and processing circuitry. The transceiver is configured to receive an input packet having an input header and forward an output packet having an output header. The processing circuitry is configured to parse the input header, determine recommendations for forwarding a payload of the input packet using a trained neural network and based on the parsed input header, and process the input packet and generate the output packet with the output header based on the recommendations and available resources.

Abstract: A network device includes processing circuitry configured to: determine whether to initiate a temporal reconfiguration or a spatial reconfiguration of a partial reconfiguration slot on a programmable device, and initiate the temporal reconfiguration or the spatial reconfiguration of the partial reconfiguration slot in response to determining that the temporal reconfiguration or the spatial reconfiguration is to be initiated.

Abstract: A network node generates a reduced size textual network log by including a set of numerical values for a log entry within a textual network log for a network, the log entry constituting an instance of a recognizable pattern within the textual network log; and then outputs the reduced size textual network log to a network controller for configuring the network.

Abstract: A device includes a plurality of reconfigurable resources, a bus, and a configurator. The bus interconnects the plurality of reconfigurable resources. The configurator is configured to deterministically compute a segmented interconnect configuration for the bus based on operational parameters associated with the device and operational constraints associated with program modules to be executed by the plurality of reconfigurable resources.

Abstract: A network switch includes one or more queues to hold packets received from a first input flow and a second input flow. The network switch also includes a packet communication switch configured to access a first header of a first packet in the one or more queues and a second header of a second packet in the one or more queues. The first header includes first machine learning (ML) information that represents a first set of state transition probabilities under a set of actions performed at the network switch. The second header includes second ML information that represents a second set of state transition probabilities under the set of actions performed at the network switch. The packet communication switch is configured to selectively modify the first header or the second header based on a comparison of the first ML information and the second ML information.

Abstract: A programmable device includes a plurality of first partial reconfiguration slots, a plurality of transceivers and a second partial reconfiguration slot. The plurality of first partial reconfiguration slots are configured to execute one or more applications or network functions. The second partial reconfiguration slot is configured to route data traffic flows between the plurality of first partial reconfiguration slots and the plurality of transceivers.

Abstract: A network device includes processing circuitry configured to: determine whether to initiate a temporal reconfiguration or a spatial reconfiguration of a partial reconfiguration slot on a programmable device, and initiate the temporal reconfiguration or the spatial reconfiguration of the partial reconfiguration slot in response to determining that the temporal reconfiguration or the spatial reconfiguration is to be initiated.

Abstract: A network device for managing network segmentation in a network infrastructure includes at least one processor, and at least one memory including computer program code, the at least one memory and the computer program code configured to, with the at least one processor, cause the network device to receive a request to execute a distributed workload, the request including distributed workload information, compute a network configuration for the network infrastructure based on the distributed workload information and a current status of the network infrastructure, and configure a plurality of reconfigurable resources of a programmable device to execute the distributed workload based on the network configuration.

Abstract: Various example embodiments for supporting safe port removal are presented. Various example embodiments for supporting safe port removal may be configured to support safe port removal for a port of a virtual switch. Various example embodiments for supporting safe port removal for a port of a virtual switch may be configured to support safe removal of the port of the virtual switch such that the port is no longer available for use on the virtual switch. Various example embodiments for supporting safe port removal for a port of a virtual switch may be configured to support safe removal of the port of the virtual switch by performing separate logical and physical shutdowns of the port and performing one or more functions for the port (e.g., rejecting link discovery packets, continuing to handle data packets, and so forth) between the logical and physical shutdowns of the port.

Abstract: A server includes a field programmable gate array (FPGA) partitioned into a set of partial reconfiguration (PR) slots and a memory that supports a set of logical buffers. A deterministic application request module (DARM) receives application requests to allocate the set of reconfiguration slots to one or more tenants and the one or more tenants configure the allocated reconfiguration slot to perform tasks. The DARM stores data associated with the application request in a first logical buffer from the set of logical buffers. A reconfiguration slot scheduling (RSS) module identifies a first reconfiguration slot from the set of reconfiguration slots and associates the first reconfiguration slot with the first logical buffer. A reconfiguration slot initialization (RSI) module reconfigures the first reconfiguration slot to perform the tasks based on the data stored in the first logical buffer.

Abstract: A system, apparatus, method, and non-transitory computer readable medium for providing smart cache control for mission-critical and high-priority traffic flows may include a network device which is caused to, extract attributes from a network packet, determine whether to request a new flow rule from a network controller for the network packet based on the extracted attributes, transmit a new flow rule request to the network controller based on results of the determining, the new flow rule request including the extracted attributes, receive the new flow rule from the network controller in response to the new flow rule request, and store the new flow rule in at least one cache memory based on priority information of the new flow rule.

Abstract: A system, apparatus, method, and non-transitory computer readable medium for providing smart cache control for mission-critical and high-priority traffic flows may include a network device which is caused to, extract attributes from a network packet, determine whether to request a new flow rule from a network controller for the network packet based on the extracted attributes, transmit a new flow rule request to the network controller based on results of the determining, the new flow rule request including the extracted attributes, receive the new flow rule from the network controller in response to the new flow rule request, and store the new flow rule in at least one cache memory based on priority information of the new flow rule.

Abstract: A device includes a plurality of reconfigurable resources, a bus, and a configurator. The bus interconnects the plurality of reconfigurable resources. The configurator is configured to deterministically compute a segmented interconnect configuration for the bus based on operational parameters associated with the device and operational constraints associated with program modules to be executed by the plurality of reconfigurable resources.

Abstract: A processor instantiates a virtual network function (VNF) and a probe to monitor at least one metric associated with the VNF. The processor also allocates a pool of ports to the probe. A transceiver establishes one or more first interfaces between the probe and one or more applications using one or more first ports from the pool of ports. Information such as metrics generated by the ports is concurrently exchange between the probe and the applications using the first interfaces. In some cases, a second interface is established between the probe and a monitoring server. The probe reports mission critical events to the applications via the first interfaces and non-mission critical events to the monitoring server via the second interface concurrently with reporting the mission critical events.

Abstract: A network node generates a reduced size textual network log by including a set of numerical values for a log entry within a textual network log for a network, the log entry constituting an instance of a recognizable pattern within the textual network log; and then outputs the reduced size textual network log to a network controller for configuring the network.

Abstract: A method for allocating resources of a field-programmable gate array (FPGA), the method comprising: deterministically estimating a maximum latency for executing a network service at the FPGA; determining that the maximum latency is less than a threshold latency value associated with the network service; outputting an acknowledgement indicating that the maximum latency is less than or equal to the threshold latency value; receiving confirmation that the FPGA has been selected to execute the network service within a threshold time period; and deterministically scheduling the resources of the FPGA for executing the network service in response to receiving the confirmation within the threshold time period.

Abstract: A processor instantiates a virtual network function (VNF) and a probe to monitor at least one metric associated with the VNF. The processor also allocates a pool of ports to the probe. A transceiver establishes one or more first interfaces between the probe and one or more applications using one or more first ports from the pool of ports. Information such as metrics generated by the ports is concurrently exchange between the probe and the applications using the first interfaces. In some cases, a second interface is established between the probe and a monitoring server. The probe reports mission critical events to the applications via the first interfaces and non-mission critical events to the monitoring server via the second interface concurrently with reporting the mission critical events.

Abstract: A server includes a field programmable gate array (FPGA) partitioned into a set of partial reconfiguration (PR) slots and a memory that supports a set of logical buffers. A deterministic application request module (DARM) receives application requests to allocate the set of reconfiguration slots to one or more tenants and the one or more tenants configure the allocated reconfiguration slot to perform tasks. The DARM stores data associated with the application request in a first logical buffer from the set of logical buffers. A reconfiguration slot scheduling (RSS) module identifies a first reconfiguration slot from the set of reconfiguration slots and associates the first reconfiguration slot with the first logical buffer. A reconfiguration slot initialization (RSI) module reconfigures the first reconfiguration slot to perform the tasks based on the data stored in the first logical buffer.

Abstract: A network switch includes one or more queues to hold packets received from a first input flow and a second input flow. The network switch also includes a packet communication switch configured to access a first header of a first packet in the one or more queues and a second header of a second packet in the one or more queues. The first header includes first machine learning (ML) information that represents a first set of state transition probabilities under a set of actions performed at the network switch. The second header includes second ML information that represents a second set of state transition probabilities under the set of actions performed at the network switch. The packet communication switch is configured to selectively modify the first header or the second header based on a comparison of the first ML information and the second ML information.