Abstract: A device includes a first substrate that includes a first set of contacts. The device also includes a redistribution die coupled to first contacts of the first set of contacts and to second contacts of the first set of contacts. The redistribution die includes conductors that electrically couple the first contacts of the first set of contacts to the second contacts of the first set of contacts. The device also includes a first integrated device coupled to third contacts of the first set of contacts. The device also includes a second integrated device coupled to a second substrate. The first substrate is disposed between the first integrated device and the second integrated device, and the first integrated device is electrically coupled to the second integrated device through the conductors of the redistribution die.

Abstract: A package comprising a metallization portion; an integrated device coupled to the metallization portion; a substrate; a plurality of wire bonds coupled to the substrate and the metallization portion; and an encapsulation layer coupled to the metallization portion. The encapsulation layer at least partially encapsulates the integrated device, the plurality of wire bonds and the substrate. The integrated device comprises a plurality of through substrate via interconnects.

Abstract: Aspects disclosed in the detailed description include an integrated circuit (IC) package employing a metal block with metal interconnects thermally coupling a semiconductor die (“die”) to an interposer substrate for dissipating thermal energy in the die. The die is coupled to a package substrate to provide signal routing paths to the die. To facilitate additional dies being stacked in the IC package as a three-dimensional (3D) IC (3DIC) package, the IC package also includes an interposer substrate adjacent to the die. The interposer substrate supports providing additional signal routing paths to the package substrate. The interposer substrate also includes a metal block which comprises a plurality of metal layers and is thermally coupled to the die and a metal interconnect(s) in the interposer substrate to dissipate thermal energy from the die through the metal block and through the coupled metal interconnect(s).

Abstract: A device includes a substrate and a die. A first side of the die is electrically coupled to the substrate. The device also includes interconnect conductors electrically coupled to the die through conductive paths of the substrate. The device also includes an interposer structure that includes a first side and a second side. The first side includes first contacts electrically coupled to the interconnect conductors, and the second side includes second contacts. The interposer structure also includes a plurality of patterned conductive structures electrically coupled to the first contacts and to second contacts. The device further includes a plurality of conductive posts between a second side of the die and to the first side of the interposer structure and configured to conduct heat from the die to the interposer structure.

Abstract: A package comprising a first substrate; an integrated device coupled to the first substrate, wherein the integrated device comprises a plurality of back side metallization interconnects; and a second substrate coupled to the first substrate through a first plurality of solder interconnects, wherein the second substrate is coupled to the plurality of back side metallization interconnects through the second plurality of solder interconnects.

Abstract: A device comprising a region that includes a component configured to generate heat and a thermally conductive layer coupled to the region, where the thermally conductive layer includes a plurality of segmented thermally anisotropic conductive channels. Each segmented thermally anisotropic conductive channel from the plurality of segmented thermally anisotropic conductive channels is aligned in a first direction. Each segmented thermally anisotropic conductive channel from the plurality of segmented thermally anisotropic conductive channels is configured to provide heat transfer capabilities in the first direction. The thermally conductive layer is configured to (i) reduce the junction temperature of the component and/or (ii) reduce a surface temperature of the device.

Abstract: A device includes a first integrated device coupled to a first substrate and a second integrated device coupled to a second substrate. The first substrate is disposed between the first integrated device and the second integrated device. The first integrated device is electrically connected to the second integrated device. The device also includes a heat slug defining protrusions. The protrusions are thermally coupled, via contacts of the first substrate, to the second integrated device.

Abstract: A device comprising a board; a first package coupled to the board through a plurality of solder interconnects, wherein the first package comprises: a first substrate; a first integrated device coupled to the first substrate; a heat pipe coupled to the first integrated device through a thermal interface material; a second package coupled to the first substrate through a through a plurality of inter substrate interconnects; and an encapsulation layer located between the first substrate and the second package.

Abstract: Disclosed are semiconductor packages in which a heat producing die, such as a system-on-chip (SoC) die is encapsulated in a mold between a substrate and an interposer. To help dissipate heat generated by the die, a thermally conductive lid is formed to conduct heat from the die. The lid is formed through the interposer to where it can be thermally coupled with a heat sink. In this way, the heat from the die can be conducted away.

Abstract: An integrated device includes a first die and a second die stacked above the first die and electrically interconnected to the first die. The integrated device also includes a conductive structure in thermal contact with a top surface of the first die and in thermal contact with a top surface of the second die. The conductive structure is configured to dissipate heat from the first die and the second die.

Abstract: Aspects disclosed in the detailed description include an integrated circuit (IC) package employing a metal block with metal interconnects thermally coupling a semiconductor die (“die”) to an interposer substrate for dissipating thermal energy in the die. The die is coupled to a package substrate to provide signal routing paths to the die. To facilitate additional dies being stacked in the IC package as a three-dimensional (3D) IC (3DIC) package, the IC package also includes an interposer substrate adjacent to the die. The interposer substrate supports providing additional signal routing paths to the package substrate. The interposer substrate also includes a metal block which comprises a plurality of metal layers and is thermally coupled to the die and a metal interconnect(s) in the interposer substrate to dissipate thermal energy from the die through the metal block and through the coupled metal interconnect(s).

Abstract: An IC package includes a heat-generating device and an electrical device on a surface of a substrate, a mold compound disposed on the electrical device, and a thermal structure disposed on the heat-generating device, without the mold compound, to improve heat dissipation. In an example, the thermal structure includes a thermal interface material (TIM) layer and a heat sink. In the example, the TIM layer extends from the heat-generating device to a height equal to or less than the mold compound and the heat sink includes a planar exterior surface above the heat-generating device and the electrical device. In an example, a first heat sink portion of the heat sink on the heat-generating device may be a different thickness than a second heat sink portion of the heat sink on the electrical device. The thermal structure reduces a thermal resistance between the heat-generating device and the heat sink.

Abstract: Integrated circuit (IC) packages employing a thermal conductive semiconductor package substrate with die region split and related fabrication methods are disclosed. The package substrate includes a die split where metal contacts in one or more dielectric layers of the package substrate underneath the IC die(s) are thicker (e.g., in a core die region) than other metal contacts (e.g., in a peripheral die region) in the dielectric layer. This facilitates higher thermal dissipation from the IC die(s) through the thicker metal contacts in the package substrate. Cross-talk shielding of the package substrate may not be sacrificed since thinner metal contacts of the package substrate that carry high speed signaling can be of lesser thickness than the thicker metal contacts that provide higher thermal dissipation.

Abstract: An IC package includes a heat-generating device and an electrical device on a surface of a substrate, a mold compound disposed on the electrical device, and a thermal structure disposed on the heat-generating device, without the mold compound, to improve heat dissipation. In an example, the thermal structure includes a thermal interface material (TIM) layer and a heat sink. In the example, the TIM layer extends from the heat-generating device to a height equal to or less than the mold compound and the heat sink includes a planar exterior surface above the heat-generating device and the electrical device. In an example, a first heat sink portion of the heat sink on the heat-generating device may be a different thickness than a second heat sink portion of the heat sink on the electrical device. The thermal structure reduces a thermal resistance between the heat-generating device and the heat sink.

Abstract: Examples herein include better heat transfer from application processor(s) and power management system without affecting the EMI performance. In one example, a thermal solution structure improves thermal performance of a modular system with better EMI shielding with the addition of heat conduction pillars from the substrate metal layer to TIM material, which thereafter connects to a heat pipe. The pillar transfers heat from substrate to heat pipe and connects physically to a global ground reference net of the IC package and eventually to a system motherboard while the pillar shields components inside the array/ring. This gives both a thermal and EMI shield solution in a single structure.

Abstract: Integrated circuit (IC) packages employing a thermal conductive semiconductor package substrate with die region split and related fabrication methods are disclosed. The package substrate includes a die split where metal contacts in one or more dielectric layers of the package substrate underneath the IC die(s) are thicker (e.g., in a core die region) than other metal contacts (e.g., in a peripheral die region) in the dielectric layer. This facilitates higher thermal dissipation from the IC die(s) through the thicker metal contacts in the package substrate. Cross-talk shielding of the package substrate may not be sacrificed since thinner metal contacts of the package substrate that carry high speed signaling can be of lesser thickness than the thicker metal contacts that provide higher thermal dissipation.

Abstract: An integrated circuit package having an interposer with increased thermal conductivity and techniques for fabricating such an integrated circuit package are provided. One example integrated circuit package generally includes a package substrate, at least one semiconductor die disposed above the package substrate, and an interposer disposed above the at least one semiconductor die. The interposer includes a dielectric layer, and a metallic plate disposed adjacent to a first portion of the dielectric layer. The height of the metallic plate is greater than a height of the dielectric layer.

Abstract: An integrated circuit package having an interposer with increased thermal conductivity and techniques for fabricating such an integrated circuit package are provided. One example integrated circuit package generally includes a package substrate, at least one semiconductor die disposed above the package substrate, and an interposer disposed above the at least one semiconductor die. The interposer includes a dielectric layer, and a metallic plate disposed adjacent to a first portion of the dielectric layer. The height of the metallic plate is greater than a height of the dielectric layer.