Abstract: Provided is an organic light emitting display device including a light emitting element, a driving transistor configured to provide a driving current to the light emitting element and including a first oxide semiconductor layer and a first gate electrode on disposed the first oxide semiconductor layer, a first light blocking layer overlapping the first oxide semiconductor layer under the first oxide semiconductor layer, and at least one insulating layer disposed between the first light blocking layer and the first gate electrode and made of a hydrogen-free silicon nitride material. Accordingly, it is possible to increase an S-factor of the driving transistor using the oxide semiconductor layer and secure performance.

Abstract: A semiconductor device includes a device isolation layer on a substrate; pattern groups including fin patterns extending in a first direction; and gate structures extending in a second direction to intersect the fin patterns. A first pattern group, among the pattern groups, may include first fin patterns. At least a portion of the first fin patterns may be arranged with a first pitch in the second direction. The first pattern group may include a first planar portion extending from a first recess portion. A central axis of the first recess portion may be spaced apart from a central axis of one of the first fin patterns by a first distance in the second direction. The first planar portion may have a first width in the second direction and being greater than the first pitch. The first distance may be about 0.8 times to about 1.2 times the first pitch.

Abstract: A semiconductor device includes a device isolation layer on a substrate; pattern groups including fin patterns extending in a first direction; and gate structures extending in a second direction to intersect the fin patterns. A first pattern group, among the pattern groups, may include first fin patterns. At least a portion of the first fin patterns may be arranged with a first pitch in the second direction. The first pattern group may include a first planar portion extending from a first recess portion. A central axis of the first recess portion may be spaced apart from a central axis of one of the first fin patterns by a first distance in the second direction. The first planar portion may have a first width in the second direction and being greater than the first pitch. The first distance may be about 0.8 times to about 1.2 times the first pitch.

Abstract: An electroluminescent display device includes a substrate having a display area surrounding a through-hole, and a non-display area disposed between the display area and the through-hole, a thin-film transistor disposed on an upper portion of the display area and a light-emitting element connected to the thin-film transistor, a plurality of insulating layers disposed between the substrate and the thin-film transistor, a planarization layer disposed between the thin-film transistor and the light-emitting element, and at least one anti-connection part disposed in the non-display area and including the plurality of insulating layers and the planarization layer, in which the planarization layer and the plurality of insulating layers, which constitute the anti-connection part, and each of the planarization layer and the plurality of insulating layers has an undercut shape in which a bottom surface is narrower than a top surface, so that the light-emitting part of the light-emitting element is disconnected in the th

Abstract: A semiconductor device includes a substrate having a first memory cell and a second memory cell, the first and second memory cells being adjacent to each other in a first direction, first to fourth memory fins adjacent to each other in the first direction in the first memory cell, the first to fourth memory fins protruding from the substrate, fifth to eighth memory fins adjacent to each other in the first direction in the second memory cell, the fifth to eighth memory fins protruding from the substrate, and a first shallow device isolation layer between the fourth memory fin and the fifth memory fin, a sidewall of the first shallow device isolation layer having an inflection point.

Abstract: A semiconductor device includes a device isolation layer on a substrate; pattern groups including fin patterns extending in a first direction; and gate structures extending in a second direction to intersect the fin patterns. A first pattern group, among the pattern groups, may include first fin patterns. At least a portion of the first fin patterns may be arranged with a first pitch in the second direction. The first pattern group may include a first planar portion extending from a first recess portion. A central axis of the first recess portion may be spaced apart from a central axis of one of the first fin patterns by a first distance in the second direction. The first planar portion may have a first width in the second direction and being greater than the first pitch.. The first distance may be about 0.8 times to about 1.2 times the first pitch.

Abstract: An organic light emitting diode display is discussed. The organic light emitting diode display according to an embodiment a plurality of pixels configured to operate in an image mode for displaying images, and in an electricity generation mode for generating an electric current. Each pixel includes an organic light emitting diode and a pixel driving circuit. The pixel driving circuit electrically separates the corresponding light emitting diode from one or more adjacent organic light emitting diodes in the image mode, and electrically connects the corresponding light emitting diode to the one or more adjacent organic light emitting diodes in the electricity generation mode.

Abstract: A display device includes a display panel including gate lines and data lines, the gate lines and the data lines intersecting, and pixels defined at the intersections of the gate lines and data lines, a gate driver to sequentially output a gate driving signal to the gate lines, a data driver to sequentially output a data signal to channels, a switching controller to electrically connect one of the channels with two or more of the data lines, the switching controller including a switch for each of the channels, wherein the two or more data lines are adjacent, one is directly connected to the channel and the other is connected to the channel through the switch, and a timing controller to provide a selection signal to the switch which controls the connection between the other of the two or more data lines and the channel.

Abstract: An organic light emitting diode display is discussed. The organic light emitting diode display according to an embodiment a plurality of pixels configured to operate in an image mode for displaying images, and in an electricity generation mode for generating an electric current. Each pixel includes an organic light emitting diode and a pixel driving circuit. The pixel driving circuit electrically separates the corresponding light emitting diode from one or more adjacent organic light emitting diodes in the image mode, and electrically connects the corresponding light emitting diode to the one or more adjacent organic light emitting diodes in the electricity generation mode.

Abstract: A liquid crystal display (LCD) device includes: a dummy region on which a gate driver is mounted; an active region including a plurality of pixel regions to implement an actual image; and first and second lines disposed in the dummy region, wherein the first line is formed on a substrate and the second line is formed on an insulating layer such that portions of the first and second lines overlap with the insulating layer interposed therebetween.

Abstract: A liquid crystal display device includes a display panel including gate lines and data lines, the gate lines and the data lines intersecting, and pixels defined at the intersections of the gate lines and data lines, a gate driver to sequentially output a gate driving signal to the gate lines, a data driver to sequentially output a data signal to channels, a switching controller to electrically connect one of the channels with two or more of the data lines, the switching controller including a switch for each of the channels, wherein the two or more data lines are adjacent, one is directly connected to the channel and the other is connected to the channel through the switch, and a timing controller to provide a selection signal to the switch which controls the connection between the other of the two or more data lines and the channel.

Abstract: A liquid crystal display (LCD) device includes: a dummy region on which a gate driver is mounted; an active region including a plurality of pixel regions to implement an actual image; and first and second lines disposed in the dummy region, wherein the first line is formed on a substrate and the second line is formed on an insulating layer such that portions of the first and second lines overlap with the insulating layer interposed therebetween.