Patents by Inventor Bolei Guo

Bolei Guo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230046494
    Abstract: Systems and methods for market value at risk evaluation are disclosed. In one embodiment, a method for performing a calculation workflow may include (1) a server comprising a computer processor receiving a request for a calculation; (2) the server receiving at least one data parameter; (3) the server identifying a plurality of workflow components required for the calculation; (4) the server identifying dependencies for each identified workflow component; (5) the server ordering the identified workflow components based on the dependencies for each workflow component; (6) the server retrieving data to conduct the calculation; and (7) the server performing the requested calculation using the ordered workflow components based on the data parameter and the data.
    Type: Application
    Filed: September 9, 2016
    Publication date: February 16, 2023
    Inventors: Vadim TSUKHTMAN, Hiang Swee CHIANG, Hari MOORTHY, Viktor VOROSHYLO, Bolei GUO, Jonathan Koop
  • Patent number: 7752613
    Abstract: A method and apparatus for disambiguating in a dynamic binary translator is described. The method comprises selecting a code segment for load-store memory disambiguation based at least in part on a measure of likelihood of frequency of execution of the code segment; heuristically identifying one or more ambiguous memory dependencies in the code segment for disambiguation by runtime checks; based at least in part on inspecting instructions in the code segment, and using a pointer analysis of the code segment to identify all other ambiguous memory dependencies that can be removed by the runtime checks.
    Type: Grant
    Filed: December 5, 2006
    Date of Patent: July 6, 2010
    Assignee: Intel Corporation
    Inventors: Bolei Guo, Youfeng Wu
  • Publication number: 20080134159
    Abstract: In a dynamic binary translator, selecting a code segment for load-store memory disambiguation based at least in part on a measure of likelihood of frequency of execution of the code segment, heuristically identifying one or more ambiguous memory dependencies in the code segment for disambiguation by runtime checks based at least in part on inspecting instructions in the code segment, and using a pointer analysis of the code segment to identify all other ambiguous memory dependencies that can be removed by the runtime checks.
    Type: Application
    Filed: December 5, 2006
    Publication date: June 5, 2008
    Inventors: Bolei Guo, Youfeng Wu