Abstract: A receiver circuit includes a first amplification stage and a second amplification stage. The first amplification stage is configured to generate a first output signal by differentially amplifying an input signal pair. The second amplification stage is configured to generate a second output signal by amplifying the first output signal. The receiver circuit is configured to deactivate the second amplification stage and then deactivate the first amplification stage.

Abstract: A voltage generation circuit includes a voltage generation unit configured to generate a reference voltage using a power supply voltage and output the reference voltage through a voltage output node. The voltage generation circuit also includes a pre-charge unit configured to drive the voltage output node using the power supply voltage in response to a pre-charge control signal. The voltage generation circuit further includes a pre-charge control unit configured to generate at least one sampling voltage using the power supply voltage and generate the pre-charge control signal according to a result obtained by comparing the at least one sampling voltage with the reference voltage.

Abstract: An internal reference voltage generation device may include a cell array including a plurality of cells which provide reference voltages of different levels. Each of the plurality of cells may include one of a plurality of divider resistors included in a resistor string; a transmission gate configured to output a voltage of a divider node which is connected to the one divider resistor, in response to a select signal; and a unit decoder configured to provide the select signal to the transmission gate.

Abstract: A regulator having improved voltage control capability may include a comparator, an output voltage generator, a voltage divider, and an output voltage controller. The comparator generates a comparison voltage by comparing a reference voltage with a feedback voltage. The output voltage generator generates an output voltage by using a power supply voltage, based on the comparison voltage. The voltage divider may include a first resistor and a second resistor, which generate the feedback voltage by dividing the output voltage. The output voltage controller adjusts a resistance value of at least one of the first resistor and the second resistor, based on a result of comparing the output voltage with a target voltage.

Abstract: A regulator having improved voltage control capability may include a comparator, an output voltage generator, a voltage divider, and an output voltage controller. The comparator generates a comparison voltage by comparing a reference voltage with a feedback voltage. The output voltage generator generates an output voltage by using a power supply voltage, based on the comparison voltage. The voltage divider may include a first resistor and a second resistor, which generate the feedback voltage by dividing the output voltage. The output voltage controller adjusts a resistance value of at least one of the first resistor and the second resistor, based on a result of comparing the output voltage with a target voltage.

Abstract: A power supply circuit includes a first transistor and a second transistor electrically coupled between a power supply terminal and an output terminal. When a first current path, in which output terminal through the first transistor, is formed, a voltage level of the output terminal may be controlled to be greater than or equal to a predetermined level. When a second current path, in which a current flows from the power supply terminal to the output terminal through the second transistor, is formed, the voltage level of the output terminal may be controlled to be less than or equal to the predetermined level.

Abstract: The initialization signal generation circuit includes a first driver and a second driver. The first driver includes at least one passive element and drives an initialization signal while a level of an external voltage signal reaches an initial level. The second driver drives the initialization signal in response to a control signal from a point of time that a level of the external voltage signal reaches the initial level.

Abstract: A power supply circuit includes a first transistor and a second transistor electrically coupled between a power supply terminal and an output terminal. When a first current path, in which output terminal through the first transistor, is formed, a voltage level of the output terminal may be controlled to be greater than or equal to a predetermined level. When a second current path, in which a current flows from the power supply terminal to the output terminal through the second transistor, is formed, the voltage level of the output terminal may be controlled to be less than or equal to the predetermined level.

Abstract: A block selection circuit and a semiconductor device having the same may include a row decoder which includes a high voltage generating circuit configured to output a block selection voltage in response to upper addresses, switching circuits configured to receive the block selection voltage and a precharge high voltage, and forward the block selection voltage through one of the switching circuits that is selected in response to selection signals, and pass transistor groups configured to select a memory block in response to the forwarded block selection voltage.

Abstract: The initialization signal generation circuit includes a first driver and a second driver. The first driver includes at least one passive element and drives an initialization signal while a level of an external voltage signal reaches an initial level. The second driver drives the initialization signal in response to a control signal from a point of time that a level of the external voltage signal reaches the initial level.

Abstract: A block selection circuit and a semiconductor device having the same may include a row decoder which includes a high voltage generating circuit configured to output a block selection voltage in response to upper addresses, switching circuits configured to receive the block selection voltage and aprecharge high voltage, and forward the block selection voltage through one of the switching circuits that is selected in response to selection signals, and pass transistor groups configured to select a memory block in response to the forwarded block selection voltage.

Abstract: A semiconductor device includes a register unit for storing additional bits associated with a command signal and outputting a selected additional bit corresponding to a received address; a combination circuit for combining received control bits and the selected additional bit, and outputting enable signals based on the combined bits, where the received control bits are generated in response to the command signal and a control signal; and a voltage generation circuit for outputting voltages distributed in response to the enable signals.

Abstract: An apparatus for generating a voltage includes a first voltage outputting circuit configured to receive an input voltage and adjust and output a first voltage in accordance with a temperature, a buffer circuit configured to receive the first voltage and output the received first voltage as a second voltage at an output node of the buffer circuit, and a second voltage outputting circuit configured to receive the second voltage at an input terminal and output a third voltage by dividing a driving voltage in accordance with a resistance ratio, wherein the second voltage outputting circuit includes a sub-voltage outputting circuit and a controlling circuit configured to adjust a voltage level of the third voltage through a feedback of the third voltage to the input terminal.

Abstract: A semiconductor device includes a register unit for storing additional bits associated with a command signal and outputting a selected additional bit corresponding to a received address; a combination circuit for combining received control bits and the selected additional bit, and outputting enable signals based on the combined bits, where the received control bits are generated in response to the command signal and a control signal; and a voltage generation circuit for outputting voltages distributed in response to the enable signals.

Abstract: An apparatus for generating a voltage includes a first voltage outputting circuit configured to receive an input voltage and adjust and output a first voltage in accordance with a temperature, a buffer circuit configured to receive the first voltage and output the received first voltage as a second voltage at an output node of the buffer circuit, and a second voltage outputting circuit configured to receive the second voltage at an input terminal and output a third voltage by dividing a driving voltage in accordance with a resistance ratio, wherein the second voltage outputting circuit includes a sub-voltage outputting circuit and a controlling circuit configured to adjust a voltage level of the third voltage through a feedback of the third voltage to the input terminal.

Abstract: An apparatus for generating a voltage includes a first voltage outputting circuit configured to receive an input voltage and adjust and output a first voltage in accordance with a temperature, a buffer circuit configured to receive the first voltage and output the received first voltage as a second voltage at an output node of the buffer circuit, and a second voltage outputting circuit configured to receive the second voltage at an input terminal and output a third voltage by dividing a driving voltage in accordance with a resistance ratio, wherein the second voltage outputting circuit includes a sub-voltage outputting circuit and a controlling circuit configured to adjust a voltage level of the third voltage through a feedback of the third voltage to the input terminal.

Abstract: An apparatus for generating a voltage includes a first voltage outputting circuit configured to receive an input voltage and adjust and output a first voltage in accordance with a temperature, a buffer circuit configured to receive the first voltage and output the received first voltage as a second voltage at an output node of the buffer circuit, and a second voltage outputting circuit configured to receive the second voltage at an input terminal and output a third voltage by dividing a driving voltage in accordance with a resistance ratio, wherein the second voltage outputting circuit includes a sub-voltage outputting circuit and a controlling circuit configured to adjust a voltage level of the third voltage through a feedback of the third voltage to the input terminal.