Abstract: Provided is a display device. A display device includes a display area and a buffer area disposed around the display area, a pixel electrode disposed on a substrate and in the display area, a bank covering an edge of the pixel electrode, light emitting elements disposed on the pixel electrode and extending in a thickness direction of the substrate, and a buffer disposed on the substrate and in the buffer area. The bank and the buffer are disposed on a same layer.

Abstract: A repair circuit of a semiconductor memory device features a fuse box unit, a fuse stop unit and a repair control circuit unit. The fuse box unit outputs a first control signal to command a failed cell to be substituted with a spare cell when inputted address information is identical with address information programmed in a fuse. The fuse stop unit outputs a third control signal to command the spare cell to be substituted in response to the first control signal and a second control signal for representing if the spare cell is normal or not. The repair control circuit unit substitutes the failed cell with the spare cell in response to the third control signal. As a result, the repair circuit of the present invention substitutes a failed cell with a normal spare cell when a space cell is normal, without performing a repair operation when a spare cell fails.

Abstract: A repair circuit of a semiconductor memory device features a fuse box unit, a fuse stop unit and a repair control circuit unit. The fuse box unit outputs a first control signal to command a failed cell to be substituted with a spare cell when inputted address information is identical with address information programmed in a fuse. The fuse stop unit outputs a third control signal to command the spare cell to be substituted in response to the first control signal and a second control signal for representing if the spare cell is normal or not. The repair control circuit unit substitutes the failed cell with the spare cell in response to the third control signal. As a result, the repair circuit of the present invention substitutes a failed cell with a normal spare cell when a space cell is normal, without performing a repair operation when a spare cell fails.

Abstract: An element isolation method, in particular, a shallow trench isolation (STI) method for semiconductor devices is disclosed in which a trench is formed to have a stepped structure shaped in such a fashion that it has a smaller width at its lower portion than at its upper portion. This stepped trench structure, which includes at least one step, is capable of obtaining an increased metal contact margin, thereby preventing metal contacts from being short-circuited with wells due to a misalignment thereof.