Abstract: Disclosed is a semiconductor device with a bipolar transistor and method of fabricating the same. The device may include a collector region in a semiconductor substrate. A base pattern may be disposed on the collector region. A hard mask pattern may be disposed on the base pattern. The hard mask pattern may include a buffering insulation pattern and a flatness stopping pattern stacked in sequence. An emitter electrode may be disposed in a hole that locally exposes the base pattern, penetrating the hard mask pattern. A base electrode may contact an outer sidewall of the hard mask pattern and may be disposed on the base pattern. The flatness stopping pattern may contain an insulative material with etching selectivity to the buffering insulation pattern, the emitter electrode, and the base electrode.

Abstract: A nonvolatile memory device may include a semiconductor substrate, a floating gate electrode on the semiconductor substrate that includes an acute-angled tip at an upper end, and a control gate electrode insulated from the floating gate electrode and facing at least a portion of the floating gate electrode, wherein an angle formed between the semiconductor substrate and an upper portion of a lateral surface of the floating gate electrode is smaller than an angle formed between the semiconductor substrate and a lower portion of the lateral surface of the floating gate electrode.

Abstract: Disclosed is a semiconductor device with a bipolar transistor and method of fabricating the same. The device may include a collector region in a semiconductor substrate. A base pattern may be disposed on the collector region. A hard mask pattern may be disposed on the base pattern. The hard mask pattern may include a buffering insulation pattern and a flatness stopping pattern stacked in sequence. An emitter electrode may be disposed in a hole that locally exposes the base pattern, penetrating the hard mask pattern. A base electrode may contact an outer sidewall of the hard mask pattern and may be disposed on the base pattern. The flatness stopping pattern may contain an insulative material with etching selectivity to the buffering insulation pattern, the emitter electrode, and the base electrode.

Abstract: Disclosed is a semiconductor device with a bipolar transistor and method of fabricating the same. The device may include a collector region in a semiconductor substrate. A base pattern may be disposed on the collector region. A hard mask pattern may be disposed on the base pattern. The hard mask pattern may include a buffering insulation pattern and a flatness stopping pattern stacked in sequence. An emitter electrode may be disposed in a hole that locally exposes the base pattern, penetrating the hard mask pattern. A base electrode may contact an outer sidewall of the hard mask pattern and may be disposed on the base pattern. The flatness stopping pattern may contain an insulative material with etching selectivity to the buffering insulation pattern, the emitter electrode, and the base electrode.

Abstract: Disclosed are a bipolar transistor comprising an emitter terminal and a base terminal having substantially equal heights, and a method of fabricating the same. The bipolar transistor comprises a silicon-germanium layer acting as a base and formed on a semiconductor layer acting as a collector. The bipolar transistor further comprises an insulating layer having contact windows for an emitter terminal and a collector terminal. The emitter and collector terminals are formed by forming a polysilicon layer filling the contact windows and performing a planarization process on the polysilicon layer. An ion implantation process is performed to form a polysilicon emitter terminal and a polysilicon base terminal.

Abstract: A nonvolatile memory device may include a semiconductor substrate, a floating gate electrode on the semiconductor substrate that includes an acute-angled tip at an upper end, and a control gate electrode insulated from the floating gate electrode and facing at least a portion of the floating gate electrode, wherein an angle formed between the semiconductor substrate and an upper portion of a lateral surface of the floating gate electrode is smaller than an angle formed between the semiconductor substrate and a lower portion of the lateral surface of the floating gate electrode

Abstract: Disclosed are a bipolar transistor comprising an emitter terminal and a base terminal having substantially equal heights, and a method of fabricating the same. The bipolar transistor comprises a silicon-germanium layer acting as a base and formed on a semiconductor layer acting as a collector. The bipolar transistor further comprises an insulating layer having contact windows for an emitter terminal and a collector terminal. The emitter and collector terminals are formed by forming a polysilicon layer filling the contact windows and performing a planarization process on the polysilicon layer. An ion implantation process is performed to form a polysilicon emitter terminal and a polysilicon base terminal.

Abstract: A bipolar transistor includes a substrate having a collector region of a first conductivity type, a base layer of a second conductivity type extending horizontally over the collector region, and an emitter region of the first conductivity type at least partially contained in the base layer. The bipolar transistor also includes an emitter electrode confronting an upper surface of the emitter region, and a base electrode confronting an upper surface of the base layer. A vertical profile of at least a portion the base electrode is equal to or greater than a vertical profile of the emitter electrode.