Patents by Inventor Bong-Gyun Ko

Bong-Gyun Ko has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220093624
    Abstract: A method of reducing warp imparted to a silicon wafer having a (110) plane orientation and a <111> notch orientation by anisotropic film stress of a multilayer film that is to be formed on a surface of the silicon wafer, that includes forming the multilayer film on a surface of the silicon wafer in an orientation so that a direction in which the warp of the wafer will be greatest coincides with a direction in which Young's modulus of a crystal orientation of the silicon wafer is greatest. Also, a method of reducing warp imparted to a silicon wafer having a (111) plane orientation by isotropic film stress of a multilayer film to be formed on a surface of the silicon wafer, that includes, prior to forming the multilayer film, causing the silicon wafer to have an oxygen concentration of 8.0×1017 atoms/cm3 or more (ASTM F-121, 1979).
    Type: Application
    Filed: December 3, 2021
    Publication date: March 24, 2022
    Applicant: SUMCO CORPORATION
    Inventors: Toshiaki ONO, Bong-Gyun KO
  • Patent number: 11094600
    Abstract: Provided is a method capable of predicting the warpage caused when a silicon wafer is subjected to heat treatment taking into account the effect of oxygen and a method of producing a silicon wafer. The method includes: determining the mobile dislocation density, the stress, and the time evolution of the strain of the silicon wafer being subjected to heat treatment from the rate of change in the strain and the rate of change in the mobile dislocation density; and determining the magnitude of plastic deformation of the silicon wafer as a warpage. The mobile dislocation density Ni at the start of the heat treatment is given as: Ni=A×(?Oi×L?Lo)2.5??(1), where A and L0: constants, ?Oi: the concentration of oxygen used by oxygen precipitates in the silicon wafer at the start of the heat treatment, L: the mean size of the oxygen precipitates at the start of the heat treatment.
    Type: Grant
    Filed: May 21, 2018
    Date of Patent: August 17, 2021
    Assignee: SUMCO CORPORATION
    Inventors: Bong-Gyun Ko, Kousuke Takata
  • Patent number: 10910328
    Abstract: Provided is a silicon wafer manufacturing method capable of reducing the warpage of the wafer occurring during a device process and allowing the subsequent processes, which have been suffered from problems due to severe warping of the wafer, to be carried out without problems and its manufacturing method. A silicon wafer manufacturing method according to the present invention is provided with calculating a target thickness of the silicon wafer required for ensuring a warpage reduction amount of a silicon wafer warped during a device process from a relationship between an amount of warpage of a silicon wafer and a thickness thereof occurring due to application of the same film stress to a plurality of silicon wafers having mutually different thicknesses; and processing a silicon single crystal ingot to thereby manufacture silicon wafers having the target thickness.
    Type: Grant
    Filed: June 6, 2018
    Date of Patent: February 2, 2021
    Assignee: SUMCO CORPORATION
    Inventors: Bong-Gyun Ko, Toshiaki Ono
  • Publication number: 20200411392
    Abstract: Provided is a method capable of predicting the warpage caused when a silicon wafer is subjected to heat treatment taking into account the effect of oxygen and a method of producing a silicon wafer. The method includes: determining the mobile dislocation density, the stress, and the time evolution of the strain of the silicon wafer being subjected to heat treatment from the rate of change in the strain and the rate of change in the mobile dislocation density; and determining the magnitude of plastic deformation of the silicon wafer as a warpage. The mobile dislocation density Ni at the start of the heat treatment is given as: Ni=A×(?Oi×L?L0)2.5??(1), where A and L0: constants, ?Oi: the concentration of oxygen used by oxygen precipitates in the silicon wafer at the start of the heat treatment, L: the mean size of the oxygen precipitates at the start of the heat treatment.
    Type: Application
    Filed: May 21, 2018
    Publication date: December 31, 2020
    Applicant: SUMCO CORPORATION
    Inventors: Bong-Gyun KO, Kousuke TAKATA
  • Publication number: 20200176461
    Abstract: A silicon wafer is capable of reducing the warpage of the wafer occurring during a device process and allowing the subsequent processes, which have been suffered from problems due to severe warping of the wafer, to be carried out without problems and its manufacturing method. A silicon wafer according to the present invention is a silicon wafer in which there is formed a multilayered film constituting a semiconductor device layer on one main surface thereof in a device process, which is warped in a bowl shape due to an isotropic film stress of the multilayered film, and which has a (111) plane orientation.
    Type: Application
    Filed: June 6, 2018
    Publication date: June 4, 2020
    Applicant: SUMCO CORPORATION
    Inventors: Toshiaki ONO, Bong-Gyun KO
  • Publication number: 20200091089
    Abstract: Provided is a silicon wafer manufacturing method capable of reducing the warpage of the wafer occurring during a device process and allowing the subsequent processes, which have been suffered from problems due to severe warping of the wafer, to be carried out without problems and its manufacturing method. A silicon wafer manufacturing method according to the present invention is provided with calculating a target thickness of the silicon wafer required for ensuring a warpage reduction amount of a silicon wafer warped during a device process from a relationship between an amount of warpage of a silicon wafer and a thickness thereof occurring due to application of the same film stress to a plurality of silicon wafers having mutually different thicknesses; and processing a silicon single crystal ingot to thereby manufacture silicon wafers having the target thickness.
    Type: Application
    Filed: June 6, 2018
    Publication date: March 19, 2020
    Applicant: SUMCO CORPORATION
    Inventors: Bong-Gyun KO, Toshiaki ONO
  • Publication number: 20130012008
    Abstract: The present invention provides a method of producing a high quality SOI wafer having a thin BOX layer with high productivity. In the method of producing an SOI wafer by performing heat treatment on a silicon wafer after implanting oxygen ions into silicon wafer, first ion implantation is performed on the silicon wafer to a high dose of 2×1017 ions/cm2 to 3×1017 ions/cm2, and then second ion implantation is performed to a low dose of 5×1014 ions/cm2 to 1×1016 ions/cm2. Subsequently, heat treatment is performed in a high oxygen concentration atmosphere at an oxygen partial pressure ratio of 10% to 80%, and then heat treatment is performed in a low oxygen atmosphere at an oxygen partial pressure ratio of less than 10%. After that, heat treatment is performed in a chlorine-containing gas atmosphere by adjusting the oxygen atmosphere to the chlorine-containing gas atmosphere by flowing argon through a chlorine-containing solution.
    Type: Application
    Filed: March 23, 2011
    Publication date: January 10, 2013
    Inventors: Bong-Gyun Ko, Tetsuya Nakai
  • Patent number: 8153450
    Abstract: At oxygen ion implanting steps in manufacture of a SIMOX wafer, a path is formed inside or on a back surface of wafer holding means, and oxygen ions are implanted while heating an outer peripheral portion of the wafer that is in contact with the wafer holding means by flowing a heated fluid through this path. An in-plane temperature of a wafer held at the time of ion implantation is prevented from becoming uneven, and in-plane film thicknesses of both an SOI layer and a BOX layer are uniformed.
    Type: Grant
    Filed: January 28, 2010
    Date of Patent: April 10, 2012
    Assignee: Sumco Corporation
    Inventor: Bong-Gyun Ko
  • Patent number: 7910463
    Abstract: A SIMOX wafer is produced by implanting an oxygen ion, in which a hydrogen ion is implanted at a dose of 1015-1017/cm2 before or after the step of the oxygen ion implantation.
    Type: Grant
    Filed: April 9, 2007
    Date of Patent: March 22, 2011
    Assignee: Sumco Corporation
    Inventors: Yoshio Murakami, Bong-Gyun Ko
  • Patent number: 7811878
    Abstract: To easily and accurately flush a substrate surface serving an SOI area with a substrate surface serving as a bulk area, make a buried oxide film, and prevent an oxide film from being exposed on substrate surface. After partially forming a mask oxide film 23 on the surface of a substrate 12 constituted of single crystal silicon, oxygen ions 16 are implanted into the surface of the substrate through the mask oxide film, and the substrate is annealed to form an buried oxide film 13 inside the substrate. Further included is a step of forming a predetermined-depth concave portion 12c deeper than substrate surface 12b serving as a bulk area on which the mask oxide film is formed on the substrate surface 12a serving as an SOI area by forming a thermally grown oxide film 21 on the substrate surface 12a serving as an SOI area on which the mask oxide film is not formed between the step of forming the mask oxide film and the step of implanting oxygen ions.
    Type: Grant
    Filed: April 14, 2009
    Date of Patent: October 12, 2010
    Assignees: Sumco Corporation, Kabushiki Kaisha Toshiba
    Inventors: Tetsuya Nakai, Bong-Gyun Ko, Takeshi Hamamoto, Takashi Yamada
  • Publication number: 20100197047
    Abstract: At oxygen ion implanting steps in manufacture of a SIMOX wafer, a path is formed inside or on a back surface of wafer holding means, and oxygen ions are implanted while heating an outer peripheral portion of the wafer that is in contact with the wafer holding means by flowing a heated fluid through this path. An in-plane temperature of a wafer held at the time of ion implantation is prevented from becoming uneven, and in-plane film thicknesses of both an SOI layer and a BOX layer are uniformed.
    Type: Application
    Filed: January 28, 2010
    Publication date: August 5, 2010
    Applicant: SUMCO CORPORATION
    Inventor: Bong-Gyun KO
  • Patent number: 7727867
    Abstract: A MLD-SIMOX wafer is obtained by forming a first ion-implanted layer in a silicon wafer; forming a second ion-implanted layer that is in an amorphous state; and subjecting the wafer to a high-temperature heat treatment to maintain the wafer in an atmosphere containing oxygen at a temperature that is not lower than 1300° C. but lower than a silicon melting point to change the first and the second ion-implanted layers into a BOX layer, wherein the dose amount for the first ion-implanted layer is 1.25 to 1.5×1017 atoms/cm2, the dose amount for the second ion-implanted layer is 1.0×1014 to 1×1016 atoms/cm2, the wafer is preheated to a temperature of 50° C. to 200° C. before forming the second ion-implanted layer, and the second ion-implanted layer is formed in a state where it is continuously heated to a preheating temperature.
    Type: Grant
    Filed: February 21, 2007
    Date of Patent: June 1, 2010
    Assignee: Sumco Corporation
    Inventors: Yoshiro Aoki, Bong-Gyun Ko
  • Publication number: 20090203187
    Abstract: To easily and accurately flush a substrate surface serving an SOI area with a substrate surface serving as a bulk area, make a buried oxide film, and prevent an oxide film from being exposed on substrate surface. After partially forming a mask oxide film 23 on the surface of a substrate 12 constituted of single crystal silicon, oxygen ions 16 are implanted into the surface of the substrate through the mask oxide film, and the substrate is annealed to form an buried oxide film 13 inside the substrate. Further included is a step of forming a predetermined-depth concave portion 12c deeper than substrate surface 12b serving as a bulk area on which the mask oxide film is formed on the substrate surface 12a serving as an SOI area by forming a thermally grown oxide film 21 on the substrate surface 12a serving as an SOI area on which the mask oxide film is not formed between the step of forming the mask oxide film and the step of implanting oxygen ions.
    Type: Application
    Filed: April 14, 2009
    Publication date: August 13, 2009
    Applicants: SUMCO CORPORATION, KABUSHIKI KAISHA TOSHIBA
    Inventors: Tetsuya NAKAI, Bong-Gyun KO, Takeshi HAMAMOTO, Takashi YAMADA
  • Patent number: 7537989
    Abstract: To easily and accurately flush a substrate surface serving an SOI area with a substrate surface serving as a bulk area, make a buried oxide film, and prevent an oxide film from being exposed on substrate surface. After partially forming a mask oxide film 23 on the surface of a substrate 12 constituted of single crystal silicon, oxygen ions 16 are implanted into the surface of the substrate through the mask oxide film, and the substrate is annealed to form a buried oxide film 13 inside the substrate. Further included is a step of forming a predetermined-depth concave portion 12c deeper than substrate surface 12b serving as a bulk area on which the mask oxide film is formed on the substrate surface 12a serving as an SOI area by forming a thermally grown oxide film 21 on the substrate surface 12a serving as an SOI area on which the mask oxide film is not formed between the step of forming the mask oxide film and the step of implanting oxygen ions.
    Type: Grant
    Filed: November 13, 2006
    Date of Patent: May 26, 2009
    Assignees: Sumco Corporation, Kabushiki Kaisha Toshiba
    Inventors: Tetsuya Nakai, Bong-Gyun Ko, Takeshi Hamamoto, Takashi Yamada
  • Publication number: 20080242048
    Abstract: To easily and accurately flush a substrate surface serving an SOI area with a substrate surface serving as a bulk area, make a buried oxide film, and prevent an oxide film from being exposed on substrate surface. After partially forming a mask oxide film 23 on the surface of a substrate 12 constituted of single crystal silicon, oxygen ions 16 are implanted into the surface of the substrate through the mask oxide film, and the substrate is annealed to form an buried oxide film 13 inside the substrate. Further included is a step of forming a predetermined-depth concave portion 12c deeper than substrate surface 12b serving as a bulk area on which the mask oxide film is formed on the substrate surface 12a serving as an SOI area by forming a thermally grown oxide film 21 on the substrate surface 12a serving as an SOI area on which the mask oxide film is not formed between the step of forming the mask oxide film and the step of implanting oxygen ions.
    Type: Application
    Filed: November 13, 2006
    Publication date: October 2, 2008
    Applicants: SUMCO CORPORATION, TOSHIBA CORPORATION
    Inventors: Tetsuya Nakai, Bong Gyun Ko, Takeshi Hamamoto, Takashi Yamada
  • Publication number: 20070238312
    Abstract: A SIMOX wafer is produced by implanting an oxygen ion, in which a hydrogen ion is implanted at a dose of 1015?1017/cm2 before or after the step of the oxygen ion implantation.
    Type: Application
    Filed: April 9, 2007
    Publication date: October 11, 2007
    Applicant: SUMCO CORPORATION
    Inventors: Yoshio Murakami, Bong-Gyun Ko
  • Publication number: 20070196995
    Abstract: There is obtained an MLD-SIMOX wafer having a BOX layer with a thin film thickness that allows a reduction in SOI layer surface roughness and interface roughness of the BOX layer and the SOI layer and an improvement in breakdown voltage. In a method for manufacturing a SIMOX wafer comprising a step of forming a first ion-implanted layer in a silicon wafer; a step of forming a second ion-implanted layer that is in an amorphous state; and a high-temperature heat treatment state of maintaining the wafer in an atmosphere containing oxygen at a temperature that is not lower than 1300° C. but lower than a silicon melting point to change the first and the second ion-implanted layers into a BOX layer, the method is characterized in that a dose amount for the first ion-implanted layer is 1.25 to 1.5×1017 atoms/cm2, a dose amount for the second ion-implanted layer is 1.0×1014 to 1×1016 atoms/cm2, a step of preheating the wafer to a temperature that is not lower than 50° C. but lower than 200° C.
    Type: Application
    Filed: February 21, 2007
    Publication date: August 23, 2007
    Inventors: Yoshiro Aoki, Bong-Gyun Ko