Abstract: A communication chipset and a communication apparatus are disclosed. A register map establishes a communication channel with a plurality of apparatuses, a first data link module sends/receives physical layer data of a first type and processes a data link layer in accordance with the first type, and a second data link module sends/receives physical layer data of a second type and processing a data link layer in accordance with the second type. Further, a first processing module is connected to the first data link module and the second data link module and filters out data link data from the first data link module and the second data link module by using setup data of a plurality of communication channels stored in the register map.

Abstract: A communication chipset and a communication apparatus are disclosed. A register map establishes a communication channel with a plurality of apparatuses, a first data link module sends/receives physical layer data of a first type and processes a data link layer in accordance with the first type, and a second data link module sends/receives physical layer data of a second type and processing a data link layer in accordance with the second type. Further, a first processing module is connected to the first data link module and the second data link module and filters out data link data from the first data link module and the second data link module by using setup data of a plurality of communication channels stored in the register map.

Abstract: Disclosed are an IPv4/IPv6 dual stack software/hardware apparatus for processing an Internet packet and a method thereof. The IPv4/IPv6 dual stack software/hardware apparatus for processing an internet packet includes: a hardware type packet processor configured to process the Internet packet by a system logic circuit; a software type packet processor configured to process the Internet packet according to execution of a previously prepared program; and a packet process controller configured to receive the Internet packet to control the hardware type packet processor to process the Internet packet of a preset protocol, and to control the software type packet processor to process the Internet packet of another preset protocol.

Abstract: Disclosed are an IPv4/IPv6 dual stack software/hardware apparatus for processing an Internet packet and a method thereof. The IPv4/IPv6 dual stack software/hardware apparatus for processing an internet packet includes: a hardware type packet processor configured to process the Internet packet by a system logic circuit; a software type packet processor configured to process the Internet packet according to execution of a previously prepared program; and a packet process controller configured to receive the Internet packet to control the hardware type packet processor to process the Internet packet of a preset protocol, and to control the software type packet processor to process the Internet packet of another preset protocol.

Abstract: The present invention relates to a technology where, in the state that start pointers for n transmit buffers each having Ethernet frame size are fixedly declared and thus fixed addresses are assigned to the transmit buffers, packets can be stably retransmitted utilizing the fixed addresses of the transmit buffers, without executing dynamic pointer operations in re-transmission.

Abstract: A dual stack module controlling apparatus for low power consumption is disclosed. The dual stack module controlling apparatus for low power consumption includes an IP address version determining part to determine an IP address version based on current IP address assignment information transmitted thereto from an IP address control module, and an internet protocol stack controlling part to activate a TCP/UDP stack processor module, an IP stack processor module and an IP packet preprocessor module for processing data of the determined IP address version and to deactivate a TCP/UDP stack processor module, an IP stack processor module and an IP packet preprocessor module for processing data of a different IP address version from the determining IP address version. According to the dual stack module controlling apparatus for low power consumption, one of the IPv4 and IPv6 modules may be activated as necessary.