Abstract: A nonvolatile memory device includes a plurality of memory cells and a page buffer including a plurality of page buffer units each connected to the plurality of memory cells through one bit line of a plurality of bit lines and configured to generate output data based on data states of the plurality of memory cells. A first page buffer unit of the plurality of page buffer units includes first to third latches which latch first to third read data at first to third time points, respectively by developing a voltage level of the sensing node, and a fourth latch which generates a fourth read data based on the second and third read data. The first page buffer unit is configured to selectively output the fourth read data as the output data, depending on whether an error correction of the first read data is possible.

Abstract: An operation method of a nonvolatile memory device includes receiving control signals and a data signal from external of the nonvolatile memory device, generating debugging information based on the control signals and the data signal, receiving a debugging information request from external of the nonvolatile memory device, and outputting the debugging information in response to the debugging information request.

Abstract: A nonvolatile memory device includes a plurality of memory cells and a page buffer including a plurality of page buffer units each connected to the plurality of memory cells through one bit line of a plurality of bit lines and configured to generate output data based on data states of the plurality of memory cells. A first page buffer unit of the plurality of page buffer units includes first to third latches which latch first to third read data at first to third time points, respectively by developing a voltage level of the sensing node, and a fourth latch which generates a fourth read data based on the second and third read data. The first page buffer unit is configured to selectively output the fourth read data as the output data, depending on whether an error correction of the first read data is possible.

Abstract: A nonvolatile memory device includes a memory cell array, a voltage generator, and a control circuit. The voltage generator generates word-line voltages to be applied to the memory cell array. The control circuit generates control signals that control the voltage generator in response to a command and an address. The control circuit includes a hacking detection circuit. The hacking detection circuit disables an operation of the nonvolatile memory device when a hacking is detected, wherein the hacking is detected when an access sequence of the command and the address does not match a standard sequence of the nonvolatile memory device a consecutive number of times.

Abstract: A memory device includes memory groups, storing data, and a boosting interface. The boosting interface transfers the data by determining a transfer path of the data based on a command and an access address. The boosting interface includes a reconfigurable input decoder in which a program command of the command is programmed based on a command set mode and an input-output set mode. The memory device has an enhanced performance by programming the program command in the reconfigurable input decoder based on the command set mode and the input-output set mode.

Abstract: An operating method of a nonvolatile memory system includes receiving a read request for at least one page from a host. Upon receiving the read request, read voltages are adjusted using a read history table to perform a first read operation in which data stored at the nonvolatile memory is read. An optimal read voltage set is detected when data read according to the first read operation includes an uncorrectable error, and a second read operation is performed in which the stored data is read based on the detected optimal read voltage set. The read history table is updated based on a reliability parameter indicating a characteristic of the nonvolatile memory, a characteristic of the data at the first or second read operation, the optimal read voltage, or the read history table.

Abstract: A method of initializing a storage device includes; resetting an interface chip in response to a reset signal generated by the memory controller, loading a boot loader from a nonvolatile memory device via the interface chip in response to a nonvolatile memory initialization signal generated by the memory controller, and initializing a plurality of nonvolatile memory devices by executing the boot loader in the memory controller.

Abstract: A nonvolatile memory device includes a nonvolatile memory cell array, where N bits are stored in a single memory cell (N being an integer greater than or equal to 2), and a page buffer circuit electrically connected to the nonvolatile memory cell array. The page buffer circuit includes at least N latches configured to temporarily store data. A data input/output circuit connected to the page buffer circuit receives programmed input data and provides the input data to the page buffer circuit. A control logic controls the page buffer and initializes a target latch value before receiving all input data of a program unit from the data input/output circuit.

Abstract: A nonvolatile memory device includes a memory cell array, a voltage generator, and a control circuit. The voltage generator generates word-line voltages to be applied to the memory cell array. The control circuit generates control signals that control the voltage generator in response to a command and an address. The control circuit includes a hacking detection circuit. The hacking detection circuit disables an operation of the nonvolatile memory device when a hacking is detected, wherein the hacking is detected when an access sequence of the command and the address does not match a standard sequence of the nonvolatile memory device a consecutive number of times.

Abstract: A memory device includes memory groups, storing data, and a boosting interface. The boosting interface transfers the data by determining a transfer path of the data based on a command and an access address. The boosting interface includes a reconfigurable input decoder in which a program command of the command is programmed based on a command set mode and an input-output set mode. The memory device has an enhanced performance by programming the program command in the reconfigurable input decoder based on the command set mode and the input-output set mode.

Abstract: A method of initializing a storage device includes; resetting an interface chip in response to a reset signal generated by the memory controller, loading a boot loader from a nonvolatile memory device via the interface chip in response to a nonvolatile memory initialization signal generated by the memory controller, and initializing a plurality of nonvolatile memory devices by executing the boot loader in the memory controller.

Abstract: A method for driving a nonvolatile memory device includes performing an erase operation with respect to a plurality of memory cells, stopping the erase operation by a suspend command, calculating a residual time of the erase operation that has not yet been performed, performing a first operation, comparing a first vacant time between a completion time point of the first operation and a start time point of a second operation with the residual time, performing the erase operation that has not yet been performed if the residual time is equal to or shorter than the first vacant time, and performing the second operation if the residual time is longer than the first vacant time.

Abstract: A method of operating a memory system includes reading data of first memory cells, the first memory cells being connected to a first wordline from among a plurality of wordlines, the plurality of wordlines including one or more dummy wordlines and one or more normal wordlines; determining whether the first wordline is one of the one or more dummy wordlines by determining, based on the read data, a number of the first memory cells having a first threshold voltage state, the one or more dummy wordlines being wordlines the memory cells of which have been programmed with dummy data, the one or more normal wordlines being wordlines that are not dummy wordlines; and performing a repair algorithm for correcting an error in the read data, selectively according to a result of the determination.

Abstract: An operating method of a nonvolatile memory system includes receiving a read request for at least one page from a host. Upon receiving the read request, read voltages are adjusted using a read history table to perform a first read operation in which data stored at the nonvolatile memory is read. An optimal read voltage set is detected when data read according to the first read operation includes an uncorrectable error, and a second read operation is performed in which the stored data is read based on the detected optimal read voltage set. The read history table is updated based on a reliability parameter indicating a characteristic of the nonvolatile memory, a characteristic of the data at the first or second read operation, the optimal read voltage, or the read history table.

Abstract: A method for driving a nonvolatile memory device includes performing an erase operation with respect to a plurality of memory cells, stopping the erase operation by a suspend command, calculating a residual time of the erase operation that has not yet been performed, performing a first operation, comparing a first vacant time between a completion time point of the first operation and a start time point of a second operation with the residual time, performing the erase operation that has not yet been performed if the residual time is equal to or shorter than the first vacant time, and performing the second operation if the residual time is longer than the first vacant time.

Abstract: A method of operating a memory system including a non-volatile memory device and a memory controller controlling the non-volatile memory device, includes reading data from a memory cell array in a unit of a page which includes a plurality of sectors; performing error correction decoding on the read data in a unit of a sector of the page; selecting at least one target sector which includes at least one uncorrectable error and selecting at least one pass sector wherein all errors of the pass sector are correctable by the error correction decoding; inhibiting precharging of bit-lines connected to the at least one pass sector while precharging target bit lines connected to the at least one target sector; and performing a read retry operation for data in the at least one target sector.

Abstract: The inventive concept relates to a nonvolatile memory device and a method of detecting a defective word line. The method includes executing a defective word line detection operation using a program/erase voltage applied to a selected word line, wherein the defective word line detection operation determines whether or not the selected word line is defective in relation to respective word line voltage responses for the first and second segments during execution of the program/erase operation.

Abstract: The inventive concept relates to a nonvolatile memory device and a method of detecting a defective word line. The method includes executing a defective word line detection operation using a program/erase voltage applied to a selected word line, wherein the defective word line detection operation determines whether or not the selected word line is defective in relation to respective word line voltage responses for the first and second segments during execution of the program/erase operation.

Abstract: A method of operating a memory system includes reading data of first memory cells, the first memory cells being connected to a first wordline from among a plurality of wordlines, the plurality of wordlines including one or more dummy wordlines and one or more normal wordlines; determining whether the first wordline is one of the one or more dummy wordlines by determining, based on the read data, a number of the first memory cells having a first threshold voltage state, the one or more dummy wordlines being wordlines the memory cells of which have been programmed with dummy data, the one or more normal wordlines being wordlines that are not dummy wordlines; and performing a repair algorithm for correcting an error in the read data, selectively according to a result of the determination.

Abstract: A method of operating a memory system including a non-volatile memory device and a memory controller controlling the non-volatile memory device, includes reading data from a memory cell array in a unit of a page which includes a plurality of sectors; performing error correction decoding on the read data in a unit of a sector of the page; selecting at least one target sector which includes at least one uncorrectable error and selecting at least one pass sector wherein all errors of the pass sector are correctable by the error correction decoding; inhibiting precharging of bit-lines connected to the at least one pass sector while precharging target bit lines connected to the at least one target sector; and performing a read retry operation for data in the at least one target sector.