Patents by Inventor Bong-Seok Jeon

Bong-Seok Jeon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240132364
    Abstract: Provided is an aerogel blanket and a method for producing the same, wherein a catalyzed sol is sufficiently and uniformly impregnated into a blanket in an impregnation tank, and the catalyzed sol is allowed to stay in the impregnation tank for a specific time to control fluidity while achieving a viscosity at which the catalyzed sol can be easily introduced into the blanket, thereby forming a uniform aerogel in the blanket. As a result, the uniformity of pore structure and thermal insulation performance of an aerogel blanket are improved, the loss of raw materials is reduced through the impregnation process, the occurrence of process problems is reduced, and the generation of dust is reduced.
    Type: Application
    Filed: December 12, 2023
    Publication date: April 25, 2024
    Inventors: Young Hun KIM, Se Won BAEK, Sung Min YU, Kyung Seok MIN, Hyun Woo JEON, Sang Woo PARK, Bong June KIM
  • Patent number: 11926529
    Abstract: Provided is an aerogel blanket and a method for producing the same, wherein a catalyzed sol I sufficiently and uniformly impregnated into a blanket in an impregnation tank, and the catalyzed sol is allowed to stay in the impregnation tank for a specific time to control fluidity while achieving a viscosity at which the catalyzed sol can be easily introduced into the blanket, thereby forming a uniform aerogel in the blanket. As a result, the uniformity of pore structure and thermal insulation performance of an aerogel blanket are improved, the loss of raw materials is reduced through the impregnation process, the occurrence of process problems is reduced, and the generation of dust is reduced.
    Type: Grant
    Filed: August 28, 2020
    Date of Patent: March 12, 2024
    Assignee: LG Chem, Ltd.
    Inventors: Young Hun Kim, Se Won Baek, Sung Min Yu, Kyung Seok Min, Hyun Woo Jeon, Sang Woo Park, Bong June Kim
  • Patent number: 11462545
    Abstract: A method for fabricating a semiconductor device includes: forming a transistor in a semiconductor substrate; forming a capacitor including a hydrogen-containing top electrode over the transistor; and performing an annealing process for hydrogen passivation after the capacitor is formed.
    Type: Grant
    Filed: January 21, 2020
    Date of Patent: October 4, 2022
    Assignee: SK hynix Inc.
    Inventors: Il-Sik Jang, Ji-Hwan Park, Mi-Ri Lee, Bong-Seok Jeon, Yong-Soo Joung, Sun-Hwan Hwang
  • Publication number: 20200161307
    Abstract: A method for fabricating a semiconductor device includes: forming a transistor in a semiconductor substrate; forming a capacitor including a hydrogen-containing top electrode over the transistor; and performing an annealing process for hydrogen passivation after the capacitor is formed.
    Type: Application
    Filed: January 21, 2020
    Publication date: May 21, 2020
    Inventors: Il-Sik JANG, Ji-Hwan PARK, Mi-Ri LEE, Bong-Seok JEON, Yong-Soo JOUNG, Sun-Hwan HWANG
  • Patent number: 10559569
    Abstract: A method for fabricating a semiconductor device includes: forming a transistor in a semiconductor substrate; forming a capacitor including a hydrogen-containing top electrode over the transistor; and performing an annealing process for hydrogen passivation after the capacitor is formed.
    Type: Grant
    Filed: September 11, 2017
    Date of Patent: February 11, 2020
    Assignee: SK hynix Inc.
    Inventors: Il-Sik Jang, Ji-Hwan Park, Mi-Ri Lee, Bong-Seok Jeon, Yong-Soo Joung, Sun-Hwan Hwang
  • Publication number: 20180175042
    Abstract: A method for fabricating a semiconductor device includes: forming a transistor in a semiconductor substrate; forming a capacitor including a hydrogen-containing top electrode over the transistor; and performing an annealing process for hydrogen passivation after the capacitor is formed.
    Type: Application
    Filed: September 11, 2017
    Publication date: June 21, 2018
    Inventors: Il-Sik JANG, Ji-Hwan PARK, Mi-Ri LEE, Bong-Seok JEON, Yong-Soo JOUNG, Sun-Hwan HWANG
  • Patent number: 9318595
    Abstract: A method for fabricating a semiconductor device includes ion-implanting germanium into a monocrystalline silicon-containing substrate; forming a gate oxide layer over a surface of the monocrystalline silicon-containing substrate and forming, under the gate oxide layer, a germanium-rich region in which the germanium is concentrated, by performing a plasma oxidation process; and crystallizing the germanium-rich region by performing an annealing process.
    Type: Grant
    Filed: January 27, 2014
    Date of Patent: April 19, 2016
    Assignee: SK Hynix Inc.
    Inventors: Seung-Mi Lee, Yun-Hyuck Ji, Beom-Yong Kim, Bong-Seok Jeon
  • Patent number: 9236327
    Abstract: A semiconductor device includes: a punch stop region formed in a substrate; a plurality of buried bit lines formed over the substrate; a plurality of pillar structures formed over the buried bit lines; a plurality of word lines extending to intersect the buried bit lines and being in contact with the pillar structures; and an isolation layer isolating the word lines from the buried bit lines.
    Type: Grant
    Filed: April 29, 2014
    Date of Patent: January 12, 2016
    Assignee: SK Hynix Inc.
    Inventors: Heung-Jae Cho, Bong-Seok Jeon
  • Publication number: 20140232014
    Abstract: A semiconductor device includes: a punch stop region formed in a substrate; a plurality of buried bit lines formed over the substrate; a plurality of pillar structures formed over the buried bit lines; a plurality of word lines extending to intersect the buried bit lines and being in contact with the pillar structures; and an isolation layer isolating the word lines from the buried bit lines.
    Type: Application
    Filed: April 29, 2014
    Publication date: August 21, 2014
    Applicant: SK hynix Inc.
    Inventors: Heung-Jae CHO, Bong-Seok JEON
  • Publication number: 20140203337
    Abstract: A method for fabricating a semiconductor device includes ion-implanting germanium into a monocrystalline silicon-containing substrate; forming a gate oxide layer over a surface of the monocrystalline silicon-containing substrate and forming, under the gate oxide layer, a germanium-rich region in which the germanium is concentrated, by performing a plasma oxidation process; and crystallizing the germanium-rich region by performing an annealing process.
    Type: Application
    Filed: January 27, 2014
    Publication date: July 24, 2014
    Applicant: SK hynix Inc.
    Inventors: Seung-Mi LEE, Yun-Hyuck JI, Beom-Yong KIM, Bong-Seok JEON
  • Patent number: 8748265
    Abstract: A semiconductor device includes: a punch stop region formed in a substrate; a plurality of buried bit lines formed over the substrate; a plurality of pillar structures formed over the buried bit lines; a plurality of word lines extending to intersect the buried bit lines and being in contact with the pillar structures; and an isolation layer isolating the word lines from the buried bit lines.
    Type: Grant
    Filed: May 3, 2012
    Date of Patent: June 10, 2014
    Assignee: SK Hynix Inc.
    Inventors: Heung-Jae Cho, Bong-Seok Jeon
  • Patent number: 8673754
    Abstract: A method for fabricating a semiconductor device includes ion-implanting germanium into a monocrystalline silicon-containing substrate; forming a gate oxide layer over a surface of the monocrystalline silicon-containing substrate and forming, under the gate oxide layer, a germanium-rich region in which the germanium is concentrated, by performing a plasma oxidation process; and crystallizing the germanium-rich region by performing an annealing process.
    Type: Grant
    Filed: June 12, 2012
    Date of Patent: March 18, 2014
    Assignee: SK hynix Inc.
    Inventors: Seung-Mi Lee, Yun Hyuck Ji, Beom-Yong Kim, Bong-Seok Jeon
  • Publication number: 20130240957
    Abstract: A method for fabricating a semiconductor device includes ion-implanting germanium into a monocrystalline silicon-containing substrate; forming a gate oxide layer over a surface of the monocrystalline silicon-containing substrate and forming, under the gate oxide layer, a germanium-rich region in which the germanium is concentrated, by performing a plasma oxidation process; and crystallizing the germanium-rich region by performing an annealing process.
    Type: Application
    Filed: June 12, 2012
    Publication date: September 19, 2013
    Inventors: Seung-Mi LEE, Yun Hyuck JI, Beom-Yong KIM, Bong-Seok JEON
  • Publication number: 20130161832
    Abstract: A semiconductor device includes: a punch stop region formed in a substrate; a plurality of buried bit lines formed over the substrate; a plurality of pillar structures formed over the buried bit lines; a plurality of word lines extending to intersect the buried bit lines and being in contact with the pillar structures; and an isolation layer isolating the word lines from the buried bit lines.
    Type: Application
    Filed: May 3, 2012
    Publication date: June 27, 2013
    Inventors: Heung-Jae CHO, Bong-Seok Jeon
  • Patent number: 8354342
    Abstract: A method for fabricating a semiconductor device includes forming a plurality of bodies that are each isolated from another by a trench and each include a diffusion barrier region with a sidewall exposed to the trench, forming a doped layer gap-filling the trench, forming a sidewall junction at the exposed sidewall of the diffusion barrier region by annealing the doped layer, and forming a conductive line coupled with the sidewall junction to fill the trench.
    Type: Grant
    Filed: November 4, 2010
    Date of Patent: January 15, 2013
    Assignee: Hynix Semiconductor Inc.
    Inventors: Jae-Geun Oh, Seung-Joon Jeon, Jin-Ku Lee, Mi-Ri Lee, Bong-Seok Jeon
  • Publication number: 20120302047
    Abstract: A method for fabricating a semiconductor device includes forming a structure having first surfaces at a height above a second surface, which is provided between the first surfaces, forming a first silicon layer on the structure, performing a tilt ion implantation process on the first silicon layer to form a crystalline region and an amorphous region, forming a second silicon layer on the amorphous region, removing the second silicon layer and the first silicon layer until a part of the second surface is exposed, thereby forming an etch barrier, and etching using the etch barrier to form an open part that exposes a part of a sidewall of the structure.
    Type: Application
    Filed: September 13, 2011
    Publication date: November 29, 2012
    Inventors: Mi-Ri LEE, Jae-Geun Oh, Seung-Joon Jeon, Jin-Ku Lee, Bong-Seok Jeon
  • Publication number: 20120007258
    Abstract: A method for fabricating a semiconductor device includes forming a plurality of bodies that are each isolated from another by a trench and each include a diffusion barrier region with a sidewall exposed to the trench, forming a doped layer gap-filling the trench, forming a sidewall junction at the exposed sidewall of the diffusion barrier region by annealing the doped layer, and forming a conductive line coupled with the sidewall junction to fill the trench.
    Type: Application
    Filed: November 4, 2010
    Publication date: January 12, 2012
    Inventors: Jae-Geun Oh, Seung-Joon Jeon, Jin-Ku Lee, Mi-Ri Lee, Bong-Seok Jeon