Patents by Inventor Bong-Su Cho
Bong-Su Cho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12056210Abstract: An AI-based pre-training model determination system is proposed. When determination type information is input, the AI-based pre-training model determination system extracts a candidate model among a plurality of learning models on the basis of determination type information, and the candidate model determines new training data. An uppermost candidate model whose determination accuracy is greater than or equal to a first reference value preset on the basis of the determination accuracy of the candidate model is determined as a pre-training model for generation of a new learning model, thereby improving the determination accuracy of the new learning model.Type: GrantFiled: August 19, 2019Date of Patent: August 6, 2024Assignee: LG ELECTRONICS INC.Inventors: Kyong Pil Tae, Young Wook Kim, Bong Su Cho, Chang Yong Park
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Patent number: 12051187Abstract: An AI-based new learning model generation system for vision inspection on a product production line is proposed. In the AI-based new learning model generation system, the candidate set extraction module extracts two or more candidate data sets on the basis of determination type information from among a plurality of training data sets that have been applied to learning of existing learning models previously generated for the vision inspection on the product production line. In addition, an additional set determination module calculates similarity between training images of new training data and a candidate data set, and determines any one greater than or equal to a reference value as an additional training data. In addition, the new model generation module may generate a new learning model by training the additional training data set and the new training data as a pre-training model.Type: GrantFiled: August 19, 2019Date of Patent: July 30, 2024Assignee: LG ELECTRONICS INC.Inventors: Kyong Pil Tae, Young Wook Kim, Chang Yong Park, Bong Su Cho
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Publication number: 20220245402Abstract: An AI-based pre-training model determination system is proposed. When determination type information is input, the AI-based pre-training model determination system extracts a candidate model among a plurality of learning models on the basis of determination type information, and the candidate model determines new training data. An uppermost candidate model whose determination accuracy is greater than or equal to a first reference value preset on the basis of the determination accuracy of the candidate model is determined as a pre-training model for generation of a new learning model, thereby improving the determination accuracy of the new learning model.Type: ApplicationFiled: August 19, 2019Publication date: August 4, 2022Applicant: LG ELECTRONICS INC.Inventors: Kyong Pil TAE, Young Wook KIM, Bong Su CHO, Chang Yong PARK
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Publication number: 20220222807Abstract: An AI-based new learning model generation system for vision inspection on a product production line is proposed. In the AI-based new learning model generation system, the candidate set extraction module extracts two or more candidate data sets on the basis of determination type information from among a plurality of training data sets that have been applied to learning of existing learning models previously generated for the vision inspection on the product production line. In addition, an additional set determination module calculates similarity between training images of new training data and a candidate data set, and determines any one greater than or equal to a reference value as an additional training data. In addition, the new model generation module may generate a new learning model by training the additional training data set and the new training data as a pre-training model.Type: ApplicationFiled: August 19, 2019Publication date: July 14, 2022Applicant: LG ELECTRONICS INC.Inventors: Kyong Pil TAE, Young Wook KIM, Chang Yong PARK, Bong Su CHO
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Publication number: 20090028671Abstract: An in-line system for manufacturing a semiconductor package according to principles of the present invention can prevent wafer warpage due to a back-lap process and die defects due to sticking of the die. In one embodiment, the in-line system adheres a semiconductor chip to a substrate by coating a liquid adhesive agent on a rear surface of the wafer. The processes of the in-line system are preferably performed in series. More particularly, the in-line system for manufacturing a semiconductor package can include a loading unit for loading a wafer into the system. A back-lap unit can include a grinder configured to back-grind a rear surface of the wafer received from the loading unit. A cleansing unit preferably comprises an air pressure plasma generating unit for cleansing the wafer using air pressure plasma. A coating unit can be configured to form an adhesive layer on a rear surface of the cleansed wafer by using a nozzle to coat a liquid adhesive agent onto the wafer.Type: ApplicationFiled: November 20, 2007Publication date: January 29, 2009Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Ho-Tae Jin, Young-Seok Jung, Bong-Su Cho
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Patent number: 6826743Abstract: A semiconductor wafer overlay correction method for an exposure process in a semiconductor fabricating stepper incorporates variations in equipment characteristics with time. The wafer overlay correction method includes measuring an overlay error correction value of a semiconductor wafer that is exposed by the stepper, calculating an overlay error correction value by summing the measured overlay error correction value, a variation in the stepper characteristics that is obtained through an empirical characterization of input changes, and a weighting value obtained from a predetermined plurality of wafer lots, and providing the calculated overlay error correction value to the semiconductor fabricating stepper to control an exposure process of a subsequent wafer lot.Type: GrantFiled: September 4, 2002Date of Patent: November 30, 2004Assignee: Samsung Electronics Co., Ltd.Inventors: Chan-Hoon Park, Bong-Su Cho, Hyun-Tae Kang
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Patent number: 6700648Abstract: In a method for controlling a processing apparatus, an error value between an input value of the processing apparatus for processing a subject to be processed, and a measurement value obtained by measuring the subject being processed is obtained. A correction value is computed for correcting the input value of the processing apparatus in the direction of decreasing the error value, and the values are managed as processing data to be utilized in computing a next correction value. Previous processing data having a history identical to that of the subject loaded to the processing apparatus is searched, and a current bias correction value is predicted from a plurality of most recent correction values having the identical history. Also, a current random correction value is predicted by means of a neural network on the basis of a plurality of most recent random correction values. The predicted bias correction value is summed with the random correction value as a current correction value of the processing apparatus.Type: GrantFiled: February 12, 2002Date of Patent: March 2, 2004Assignee: Samsung Electronics, Co., Ltd.Inventors: Kyoung Shik Jun, Chan Hoon Park, Yil Seug Park, Bong Su Cho, Hyun Tai Kang, Jae Won Hwang, Young Ho Jei
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Publication number: 20030074639Abstract: A semiconductor wafer overlay correction method for an exposure process in a semiconductor fabricating stepper incorporates variations in equipment characteristics with time. The wafer overlay correction method includes measuring an overlay error correction value of a semiconductor wafer that is exposed by the stepper, calculating an overlay error correction value by summing the measured overlay error correction value, a variation in the stepper characteristics that is obtained through an empirical characterization of input changes, and a weighting value obtained from a predetermined plurality of wafer lots, and providing the calculated overlay error correction value to the semiconductor fabricating stepper to control an exposure process of a subsequent wafer lot.Type: ApplicationFiled: September 4, 2002Publication date: April 17, 2003Inventors: Chan-Hoon Park, Bong-Su Cho, Hyun-Tae Kang
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Publication number: 20030058428Abstract: In a method for controlling a processing apparatus, an error value between an input value of the processing apparatus for processing a subject to be processed, and a measurement value obtained by measuring the subject being processed is obtained. A correction value is computed for correcting the input value of the processing apparatus in the direction of decreasing the error value, and the values are managed as processing data to be utilized in computing a next correction value. Previous processing data having a history identical to that of the subject loaded to the processing apparatus is searched, and a current bias correction value is predicted from a plurality of most recent correction values having the identical history. Also, a current random correction value is predicted by means of a neural network on the basis of a plurality of most recent random correction values. The predicted bias correction value is summed with the random correction value as a current correction value of the processing apparatus.Type: ApplicationFiled: February 12, 2002Publication date: March 27, 2003Inventors: Kyoung Shik Jun, Chan Hoon Park, Yil Seug Park, Bong Su Cho, Hyun Tai Kang, Jae Won Hwang, Young Ho Jei
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Patent number: 6211094Abstract: A method of controlling thicknesses of thin film layers in manufacturing semiconductor devices begins with loading monitoring wafers in a thin film forming apparatus. The apparatus has multiple film formation zones, and one of the zones is a reference zone. After forming thin films on the monitoring wafers, thicknesses of the thin films formed on the monitoring wafers are measured. Then, process time and process temperatures are adjusted so that the thicknesses of films are the same as a target film thickness. Finally, thin films are formed on semiconductor wafers using the adjusted process time and temperatures.Type: GrantFiled: August 23, 1999Date of Patent: April 3, 2001Assignee: Samsung Electronics Co., Ltd.Inventors: Kyoung-Shik Jun, Young-Chul Jang, Bong-Su Cho