Patents by Inventor Bong Sub Lee

Bong Sub Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240145784
    Abstract: A winding member, including a winding core for an electrode assembly, winding a positive electrode plate, a negative electrode plate, and a first separator, the winding core including a pair of clamps extending along a longitudinal direction of the winding core a base portion coupled to a first and second end of each of the clamps the clamps being spaced apart from each other vertically around an insertion groove, the clamps including a first clamp and a second clamp extending along the longitudinal direction the first clamp including a pair of protrusions protruding in the direction of the second clamp on an inner surface of the first clamp, and at least one of the pair of protrusions fixing a winding-front end of the first separator inserted into the insertion groove to an inner surface of the second clamp.
    Type: Application
    Filed: October 5, 2023
    Publication date: May 2, 2024
    Inventors: Kyoung Tae KIM, Yeon Jin PARK, June Hyoung PARK, Joung Ku KIM, Dong Sub LEE, Bong Geun KANG
  • Patent number: 10440822
    Abstract: Interposer circuitry (130) is formed on a possibly sacrificial substrate (210) from a porous core (130?) covered by a conductive coating (130?) which increases electrical conductance. The core is printed from nanoparticle ink. Then a support (120S) is formed, e.g. by molding, to mechanically stabilize the circuitry. A magnetic field can be used to stabilize the circuitry while the circuitry or the support are being formed. Other features are also provided.
    Type: Grant
    Filed: August 21, 2017
    Date of Patent: October 8, 2019
    Assignee: Invensas Corporation
    Inventors: Bong-Sub Lee, Cyprian Emeka Uzoh, Charles G. Woychik, Liang Wang, Laura Wills Mirkarimi, Arkalgud R. Sitaram
  • Patent number: 10381326
    Abstract: A method of forming a semiconductor package comprises forming one or more first vias in a first side of a substrate and attaching a first side of a first microelectronic element to the first side of the substrate. The first microelectronic element is electrically coupled to at least one of the one or more first vias. The method further comprise obtaining a second microelectronic element including one or more second vias in a first side of the second microelectronic element, and attaching a second side of the substrate to the first side of the second microelectronic element. The second microelectronic element is electrically coupled to at least one of the one or more first vias. Each of one or more connecting elements has a first end attached to a first side of the second microelectronic element and a second end extends beyond a second side of the first microelectronic element.
    Type: Grant
    Filed: May 28, 2014
    Date of Patent: August 13, 2019
    Assignee: Invensas Corporation
    Inventors: Charles G. Woychik, Arkalgud R. Sitaram, Andrew Cao, Bong-Sub Lee
  • Publication number: 20180030971
    Abstract: A variable-capacity swash plate-type compressor including: a lug plate coupled to a swash plate so as to be fixed to a driving shaft; and the swash plate coupled to the lug plate and having a varying inclination angle while making a rotational motion. The swash plate includes a body, and first and second arms that protrude from the body toward the lug plate and are spaced apart from each other. The lug plate includes a plate, a center lug arm that protrudes from the plate to be inserted between the first and second arms and is coupled to the body of the swash plate, and left and right lug arms that protrude from the plate to be spaced apart from each other and support both sides of each of the first and second arms.
    Type: Application
    Filed: February 16, 2016
    Publication date: February 1, 2018
    Applicants: DOOWON TECHNICAL COLLEGE, DOOWON ELECTRONICS CO., LTD
    Inventors: Geon Ho LEE, Tae Jin LEE, In Pyo BAE, Hyeon Jae KIM, Bong Sub LEE, Jun Han LEE
  • Publication number: 20170374738
    Abstract: Interposer circuitry (130) is formed on a possibly sacrificial substrate (210) from a porous core (130?) covered by a conductive coating (130?) which increases electrical conductance. The core is printed from nanoparticle ink. Then a support (120S) is formed, e.g. by molding, to mechanically stabilize the circuitry. A magnetic field can be used to stabilize the circuitry while the circuitry or the support are being formed. Other features are also provided.
    Type: Application
    Filed: August 21, 2017
    Publication date: December 28, 2017
    Applicant: Invensas Corporation
    Inventors: Bong-Sub Lee, Cyprian Emeka Uzoh, Charles G. Woychik, Liang Wang, Laura Wills Mirkarimi, Arkalgud R. Sitaram
  • Patent number: 9769923
    Abstract: Interposer circuitry (130) is formed on a possibly sacrificial substrate (210) from a porous core (130?) covered by a conductive coating (130?) which increases electrical conductance. The core is printed from nanoparticle ink. Then a support (120S) is formed, e.g. by molding, to mechanically stabilize the circuitry. A magnetic field can be used to stabilize the circuitry while the circuitry or the support are being formed. Other features are also provided.
    Type: Grant
    Filed: December 15, 2016
    Date of Patent: September 19, 2017
    Assignee: Invensas Corporation
    Inventors: Bong-Sub Lee, Cyprian Emeka Uzoh, Charles G. Woychik, Liang Wang, Laura Wills Mirkarimi, Arkalgud R. Sitaram
  • Publication number: 20170099733
    Abstract: Interposer circuitry (130) is formed on a possibly sacrificial substrate (210) from a porous core (130?) covered by a conductive coating (130?) which increases electrical conductance. The core is printed from nanoparticle ink. Then a support (120S) is formed, e.g. by molding, to mechanically stabilize the circuitry. A magnetic field can be used to stabilize the circuitry while the circuitry or the support are being formed. Other features are also provided.
    Type: Application
    Filed: December 15, 2016
    Publication date: April 6, 2017
    Applicant: Invensas Corporation
    Inventors: Bong-Sub Lee, Cyprian Emeka Uzoh, Charles G. Woychik, Liang Wang, Laura Wills Mirkarimi, Arkalgud R. Sitaram
  • Patent number: 9570385
    Abstract: Interposer circuitry (130) is formed on a possibly sacrificial substrate (210) from a porous core (130?) covered by a conductive coating (130?) which increases electrical conductance. The core is printed from nanoparticle ink. Then a support (120S) is formed, e.g. by molding, to mechanically stabilize the circuitry. A magnetic field can be used to stabilize the circuitry while the circuitry or the support are being formed. Other features are also provided.
    Type: Grant
    Filed: January 22, 2015
    Date of Patent: February 14, 2017
    Assignee: Invensas Corporation
    Inventors: Bong-Sub Lee, Cyprian Emeka Uzoh, Charles G. Woychik, Liang Wang, Laura Wills Mirkarimi, Arkalgud R. Sitaram
  • Publication number: 20160218057
    Abstract: Interposer circuitry (130) is formed on a possibly sacrificial substrate (210) from a porous core (130?) covered by a conductive coating (130?) which increases electrical conductance. The core is printed from nanoparticle ink. Then a support (120S) is formed, e.g. by molding, to mechanically stabilize the circuitry. A magnetic field can be used to stabilize the circuitry while the circuitry or the support are being formed. Other features are also provided.
    Type: Application
    Filed: January 22, 2015
    Publication date: July 28, 2016
    Inventors: Bong-Sub Lee, Cyprian Emeka Uzoh, Charles G. Woychik, Liang Wang, Laura Wills Mirkarimi, Arkalgud R. Sitaram
  • Publication number: 20150348940
    Abstract: A method of forming a semiconductor package comprises forming one or more first vias in a first side of a substrate and attaching a first side of a first microelectronic element to the first side of the substrate. The first microelectronic element is electrically coupled to at least one of the one or more first vias. The method further comprise obtaining a second microelectronic element including one or more second vias in a first side of the second microelectronic element, and attaching a second side of the substrate to the first side of the second microelectronic element. The second microelectronic element is electrically coupled to at least one of the one or more first vias. Each of one or more connecting elements has a first end attached to a first side of the second microelectronic element and a second end extends beyond a second side of the first microelectronic element.
    Type: Application
    Filed: May 28, 2014
    Publication date: December 3, 2015
    Inventors: Charles G. WOYCHIK, Arkalgud R. Sitaram, Andrew Cao, Bong-Sub Lee
  • Publication number: 20140034283
    Abstract: Disclosed herein are apparatuses and methods related to an electrohydrodynamic (EHD) fluid mover that includes emitter and collector electrodes energizable to motivate fluid flow therebetween. Ozone reducing catalyst bearing heat transfer surfaces may be disposed downstream of the emitter electrode in a flow path of the motivated fluid flow. A controller may be configured to, at respective times throughout the operating life of the EHD fluid mover, selectively employ at least one ozone reduction enhancement response selected from a set of responses. One response includes triggering a conditioning mechanism to apply an additional, but at least partially consumable, ozone reducing catalyst to a surface of the emitter electrode.
    Type: Application
    Filed: March 19, 2012
    Publication date: February 6, 2014
    Inventors: Bong Sub Lee, Nels Jewell-Larsen