Patents by Inventor Bong Yeol PARK

Bong Yeol PARK has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210005260
    Abstract: A semiconductor device includes a memory string that includes a plurality of memory cells and is coupled between a source line and a bit line. A method for operating the semiconductor device may include: boosting a first channel region in a channel region of the memory string, wherein the channel region includes the first channel region at one side of the selected memory cell and a second channel region at the other side of the selected memory cell; applying a pre-program bias to a gate electrode of the selected memory cell, to inject electrons into a space region of the selected memory cell; and applying a program bias to the gate electrode.
    Type: Application
    Filed: September 21, 2020
    Publication date: January 7, 2021
    Inventors: Han Soo JOO, Bong Yeol PARK, Ji Hyun SEO, Hee Youl LEE
  • Patent number: 10854296
    Abstract: A semiconductor device includes strings each having a plurality of memory cells. The strings are coupled between a common source line and a bit line. A method of operating the semiconductor device includes applying a pre-program voltage to a selected word line coupled to a selected memory cell and to an unselected word line coupled to an unselected memory cell adjacent to the selected memory cell among the plurality of memory cells. The method further includes applying a first program voltage to the selected word line.
    Type: Grant
    Filed: July 3, 2019
    Date of Patent: December 1, 2020
    Assignee: SK hynix Inc.
    Inventors: Ji Hyun Seo, Bong Yeol Park, Hee Youl Lee, Han Soo Joo
  • Patent number: 10811097
    Abstract: A semiconductor device includes a memory string that includes a plurality of memory cells and is coupled between a source line and a bit line. A method for operating the semiconductor device may include: boosting a first channel region in a channel region of the memory string, wherein the channel region includes the first channel region at one side of the selected memory cell and a second channel region at the other side of the selected memory cell; applying a pre-program bias to a gate electrode of the selected memory cell, to inject electrons into a space region of the selected memory cell; and applying a program bias to the gate electrode.
    Type: Grant
    Filed: July 3, 2019
    Date of Patent: October 20, 2020
    Assignee: SK hynix Inc.
    Inventors: Han Soo Joo, Bong Yeol Park, Ji Hyun Seo, Hee Youl Lee
  • Publication number: 20200202933
    Abstract: A semiconductor device includes a memory string that includes a plurality of memory cells and is coupled between a source line and a bit line. A method for operating the semiconductor device may include: boosting a first channel region in a channel region of the memory string, wherein the channel region includes the first channel region at one side of the selected memory cell and a second channel region at the other side of the selected memory cell; applying a pre-program bias to a gate electrode of the selected memory cell, to inject electrons into a space region of the selected memory cell; and applying a program bias to the gate electrode.
    Type: Application
    Filed: July 3, 2019
    Publication date: June 25, 2020
    Inventors: Han Soo JOO, Bong Yeol PARK, Ji Hyun SEO, Hee Youl LEE
  • Publication number: 20200168280
    Abstract: A semiconductor device includes strings each having a plurality of memory cells. The strings are coupled between a common source line and a bit line. A method of operating the semiconductor device includes applying a pre-program voltage to a selected word line coupled to a selected memory cell and to an unselected word line coupled to an unselected memory cell adjacent to the selected memory cell among the plurality of memory cells. The method further includes applying a first program voltage to the selected word line.
    Type: Application
    Filed: July 3, 2019
    Publication date: May 28, 2020
    Applicant: SK hynix Inc.
    Inventors: Ji Hyun SEO, Bong Yeol PARK, Hee Youl LEE, Han Soo JOO
  • Patent number: 9627078
    Abstract: A semiconductor device includes a memory array including memory blocks; and an operation circuit suitable for performing a program loop and an erase loop on memory cells and selection transistors included in a selected memory block, wherein the program loop is performed by controlling a target threshold voltage value of the selection transistors based on a difference between a cell current value of the selected memory block and a reference cell current value.
    Type: Grant
    Filed: February 9, 2016
    Date of Patent: April 18, 2017
    Assignee: SK Hynix Inc.
    Inventors: Yoo Nam Jeon, Keon Soo Shim, Hae Soon Oh, Bong Yeol Park
  • Patent number: 9620224
    Abstract: A semiconductor device includes a memory array including memory blocks, and an operation circuit suitable for performing a program loop and an erase loop on memory cells and selection transistors included in a selected memory block, wherein the operation circuit performs the program loop on the selection transistors so that a difference occurs between threshold voltages of the selection transistors and a target threshold voltage based on a difference between a cell current value of the selected memory block and a reference cell current value.
    Type: Grant
    Filed: March 17, 2015
    Date of Patent: April 11, 2017
    Assignee: SK Hynix Inc.
    Inventors: Yoo Nam Jeon, Keon Soo Shim, Hae Soon Oh, Bong Yeol Park
  • Patent number: 9384846
    Abstract: Disclosed are a semiconductor memory device, a memory system including the same, and an operating method thereof. The memory system includes: a semiconductor memory device including a plurality of memory chips; and a controller configured to measure a cell current of each of the plurality of memory chips, generate temperature compensation data corresponding to the measured cell current, and store the generated temperature compensation data in each of the plurality of memory chips.
    Type: Grant
    Filed: July 7, 2015
    Date of Patent: July 5, 2016
    Assignee: SK hynix Inc.
    Inventors: Keon Soo Shim, Bong Yeol Park
  • Publication number: 20160172047
    Abstract: A semiconductor device includes a memory array including memory blocks; and an operation circuit suitable for performing a program loop and an erase loop on memory cells and selection transistors included in a selected memory block, wherein the program loop is performed by controlling a target threshold voltage value of the selection transistors based on a difference between a cell current value of the selected memory block and a reference cell current value.
    Type: Application
    Filed: February 9, 2016
    Publication date: June 16, 2016
    Inventors: Yoo Nam JEON, Keon Soo SHIM, Hae Soon OH, Bong Yeol PARK
  • Publication number: 20160125946
    Abstract: A semiconductor device includes a memory array including memory blocks, and an operation circuit suitable for performing a program loop and an erase loop on memory cells and selection transistors included in a selected memory block, wherein the operation circuit performs the program loop on the selection transistors so that a difference occurs between threshold voltages of the selection transistors and a target threshold voltage based on a difference between a cell current value of the selected memory block and a reference cell current value.
    Type: Application
    Filed: March 17, 2015
    Publication date: May 5, 2016
    Inventors: Yoo Nam JEON, Keon Soo SHIM, Hae Soon OH, Bong Yeol PARK