Patents by Inventor Bong-Jun Jang

Bong-Jun Jang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7507624
    Abstract: A method of manufacturing a semiconductor memory device is provided. The method includes: providing a semiconductor substrate, forming a cell transistor on the semiconductor substrate, and forming a SiON layer with a refractive index of about 1.8 or less on the cell transistor.
    Type: Grant
    Filed: May 11, 2006
    Date of Patent: March 24, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Euhn-Gi Lee, Bong-Jun Jang, Sung-Woon Yun
  • Patent number: 7268089
    Abstract: A method of forming a PE-TEOS layer of a semiconductor IC device provides uniformly thick PE-TEOS layers on a batch of wafers. First, a loading wafer cassette is prepared to provide the wafers to be processed. Next, a process atmosphere is pre-created in a processing chamber. Then the wafers are supplied in sequence into the chamber from the loading wafer cassette and the wafers are mounted on a heater table in the chamber. Next, the PE-TEOS layer is deposited on the wafers by spraying a process gas into the chamber through showerheads. Next, the wafers are discharged from the chamber. Once the chamber is cleared of wafers, the inside of the chamber is cleaned by supplying a cleaning gas into the chamber, and exciting the cleaning gas with RF power. Subsequently, more TEOS gas is supplied into the chamber through the showerheads without being excited by RF power to especially reduce the temperature of the showerheads and that prevailing inside the chamber.
    Type: Grant
    Filed: October 27, 2003
    Date of Patent: September 11, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Bong-Jun Jang
  • Publication number: 20060258099
    Abstract: A method of manufacturing a semiconductor memory device is provided. The method includes: providing a semiconductor substrate, forming a cell transistor on the semiconductor substrate, and forming a SiON layer with a refractive index of about 1.8 or less on the cell transistor.
    Type: Application
    Filed: May 11, 2006
    Publication date: November 16, 2006
    Inventors: Euhn-Gi Lee, Bong-Jun Jang, Sung-Woon Yun
  • Publication number: 20040106302
    Abstract: A method of forming a PE-TEOS layer of a semiconductor IC device provides uniformly thick PE-TEOS layers on a batch of wafers. First, a loading wafer cassette is prepared to provide the wafers to be processed. Next, a process atmosphere is pre-created in a processing chamber. Then the wafers are supplied in sequence into the chamber from the loading wafer cassette and the wafers are mounted on a heater table in the chamber. Next, the PE-TEOS layer is deposited on the wafers by spraying a process gas into the chamber through showerheads. Next, the wafers are discharged from the chamber. Once the chamber is cleared of wafers, the inside of the chamber is cleaned by supplying a cleaning gas into the chamber, and exciting the cleaning gas with RF power. Subsequently, more TEOS gas is supplied into the chamber through the showerheads without being excited by RF power to especially reduce the temperature of the showerheads and that prevailing inside the chamber.
    Type: Application
    Filed: October 27, 2003
    Publication date: June 3, 2004
    Inventor: Bong-Jun Jang