Patents by Inventor Boon Lok

Boon Lok has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080000676
    Abstract: A method of forming a circuit board, the method comprising mounting at least one passive component on a first surface of a first laminate material; interconnecting the passive component to contact traces and vias of the first laminate material; and attaching a second laminate material to the first surface of the first laminate material utilizing a lamination process, the second laminate material sheet having at least one of a recess, a through-hole or both formed therein for accommodating the passive component in the second laminate.
    Type: Application
    Filed: July 13, 2007
    Publication date: January 3, 2008
    Applicant: AGENCY FOR SCIENCE, TECHNOLOGY AND RESEARCH
    Inventors: SUNAPPAN VASUDIVAN, CHEE LU, BOON LOK
  • Publication number: 20070085200
    Abstract: A substrate for power decoupling and a method of forming a substrate for power decoupling. The substrate comprises one or more decoupling capacitors; and one or more interconnections to the decoupling capacitors. At least one of the interconnections comprises a lossy material.
    Type: Application
    Filed: October 18, 2005
    Publication date: April 19, 2007
    Inventors: Chee Lu, Boon Lok, Sunappan Vasudivan
  • Publication number: 20070054420
    Abstract: A substrate structure and method of wideband power decoupling comprising one or more embedded capacitors each comprising a ferroelectric material.
    Type: Application
    Filed: September 6, 2005
    Publication date: March 8, 2007
    Inventors: Chee Lu, Boon Lok
  • Publication number: 20060215380
    Abstract: An embedded capacitor structure comprising a main body; at least one embedded capacitor, having a first electrode, a dielectric layer, and a second electrode, formed in the main body; and at least one via electrical connection formed in the main body; wherein at least one of the first and second electrodes is free from direct electrical connection to the via electrical connections.
    Type: Application
    Filed: March 24, 2005
    Publication date: September 28, 2006
    Inventors: Chee Lu, Boon Lok, Kai Chua, Lai Wai
  • Publication number: 20060007662
    Abstract: A method of forming a circuit board, the method comprising mounting at least one passive component on a first surface of a first laminate material; interconnecting the passive component to contact traces and vias of the first laminate material; and attaching a second laminate material to the first surface of the first laminate material utilizing a lamination process, the second laminate material sheet having at least one of a recess, a through-hole or both formed therein for accommodating the passive component in the second laminate.
    Type: Application
    Filed: July 9, 2004
    Publication date: January 12, 2006
    Inventors: Sunappan Vasudivan, Chee Lu, Boon Lok