Abstract: The present disclosure provides for a converged compute platform architecture, including a first infrastructure processing unit (IPU)-only configuration and a second configuration wherein the IPU is coupled to a central processing unit, such as an x86 processor. Connectivity between the two configurations may be accomplished with a PCIe switch, or the two configurations may communicate through remote direct memory access (RDMA) techniques. Both configurations may use ML acceleration through a single converged architecture.

Abstract: The present disclosure provides a compute platform architecture for virtualized and cloud native network functions. The architecture uses a reduced instruction set computer-based general purpose processor along with multiple special purpose accelerators and an integrated network interface card. As such, the architecture can accommodate multiple hundreds of gigabits of input/output.