Patents by Inventor Bor-Min Tseng

Bor-Min Tseng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7268409
    Abstract: A microelectronic device including, in one embodiment, a plurality of active devices located at least partially in a substrate, at least one dielectric layer located over the plurality of active devices, and an inductor located over the dielectric layer. At least one of the plurality of active devices is located within a columnar region having a cross-sectional shape substantially conforming to a perimeter of the inductor. The at least one of the plurality of active devices may be biased based on a desired Q factor of the inductor or and/or an operating frequency of the microelectronic device.
    Type: Grant
    Filed: May 21, 2004
    Date of Patent: September 11, 2007
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Bor-Min Tseng, Chih-Sheng Chang
  • Patent number: 7223667
    Abstract: Apparatus and method of providing a CMOS varactor device having improved linearity. At least two differential varactor elements are connected in parallel. Each of the differential elements includes first, second and third doped regions in a well. A first gate controls the first and second regions and a second gate controls the second and third regions. A resistor is formed such that power applied to the bulk region of the two differential elements will differ by the voltage drop across the resistor.
    Type: Grant
    Filed: April 21, 2004
    Date of Patent: May 29, 2007
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Bor-Min Tseng
  • Publication number: 20050258507
    Abstract: A microelectronic device including, in one embodiment, a plurality of active devices located at least partially in a substrate, at least one dielectric layer located over the plurality of active devices, and an inductor located over the dielectric layer. At least one of the plurality of active devices is located within a columnar region having a cross-sectional shape substantially conforming to a perimeter of the inductor. The at least one of the plurality of active devices may be biased based on a desired Q factor of the inductor or and/or an operating frequency of the microelectronic device.
    Type: Application
    Filed: May 21, 2004
    Publication date: November 24, 2005
    Applicant: Taiwan Semiconductor Manufacturing Co. Ltd.
    Inventors: Bor-Min Tseng, Chih-Sheng Chang
  • Publication number: 20050239260
    Abstract: Apparatus and method of providing a CMOS varactor device having improved linearity. At least two differential varactor elements are connected in parallel. Each of the differential elements includes first, second and third doped regions in a well. A first gate controls the first and second regions and a second gate controls the second and third regions. A resistor is formed such that power applied to the bulk region of the two differential elements will differ by the voltage drop across the resistor.
    Type: Application
    Filed: April 21, 2004
    Publication date: October 27, 2005
    Inventor: Bor-Min Tseng