Patents by Inventor Bo Ra Lim
Bo Ra Lim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20210002817Abstract: A method for manufacturing a ceramic-coated antibacterial fabric includes adding and mixing a ceramic component, calcium carbonate, a binder, and a dispersant into water, thereby to prepare a ceramic solution; heating the ceramic solution to 110 to 130° C., then immersing a fabric in the heated ceramic solution for 100 to 200 minutes, and then drying the fabric for 100 to 150 minutes at a temperature of 50 to 70° C., thereby to form a first coated ceramic layer on the fabric; and subsequently, heating the ceramic solution to 70 to 90° C., then immersing the fabric having the first coated ceramic layer thereon in the heated ceramic solution for 100 to 200 minutes, and then drying the fabric for 100 to 150 minutes at a temperature of 50 to 70° C., thereby to form a second coated ceramic layer on the first coated ceramic layer on the fabric.Type: ApplicationFiled: June 26, 2020Publication date: January 7, 2021Inventors: Bong-hak LIM, Jong-hui AN, Bo-ra LIM
-
Patent number: 10714618Abstract: A semiconductor device includes a substrate having a fin active region pattern having a protruding shape, a device isolation layer pattern covering a side surface of a lower portion of the fin active region pattern, a spacer pattern covering a side surface of a portion of the fin active region pattern that protrudes from a top surface of the device isolation layer pattern, and a source/drain region in contact with a top surface of the fin active region pattern and a top surface of the spacer pattern.Type: GrantFiled: September 13, 2018Date of Patent: July 14, 2020Assignee: Samsung Electronics Co., Ltd.Inventors: Geum-jung Seong, Bo-ra Lim, Jeong-yun Lee, Ah-reum Ji
-
Patent number: 10573729Abstract: An integrated circuit device includes: a first fin active region extending in a first direction parallel to a top surface of a substrate; a second fin active region extending in the first direction and spaced apart from the first fin active region in a second direction different from the first direction; a gate line intersecting the first and second fin active regions; a first source/drain region on one side of the gate line in the first fin active region; and a second source/drain region on one side of the gate line in the second fin active region and facing the first source/drain region, wherein a cross-section of the first source/drain region perpendicular to the first direction has an asymmetric shape with respect to a center line of the first source/drain region in the second direction extending in a third direction perpendicular to the top surface of the substrate.Type: GrantFiled: May 21, 2019Date of Patent: February 25, 2020Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Edward Namkyu Cho, Bo-ra Lim, Geum-jung Seong, Seung-hun Lee
-
Patent number: 10522616Abstract: A semiconductor device includes: a fin-type active region protruding from a substrate and extending in a first direction; at least one nano-sheet spaced apart from an upper surface of the fin-type active region and facing the upper surface of the fin-type active region, the at least one nano-sheet having a channel region; a gate extending on the fin-type active region in a second direction crossing the first direction and surrounding at least a portion of the at least one nano-sheet; a source/drain region on the fin-type active region on both sides of the at least one nano-sheet; and a source/drain protection layer on a sidewall of the at least one nano-sheet and between the source/drain region and the at least one nano-sheet.Type: GrantFiled: November 28, 2017Date of Patent: December 31, 2019Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Edward Nam-kyu Cho, Tae-soon Kwon, Bo-ra Lim, Jeong-yun Lee
-
Publication number: 20190348414Abstract: A semiconductor device has active fins defined by an isolation pattern on a substrate, each of the active fins extending in a first direction, and the active fins being spaced apart from each other in a second direction crossing the first direction, a gate electrode extending in the second direction on the active fins and the isolation pattern, and an isolation structure on a portion of the isolation pattern between the active fins neighboring with each other in the second direction. The isolation structure includes a first pattern having a first material and a second pattern having a second material different from the first material. The second pattern covers a lower surface and a lower side surface of the first pattern but not an upper side surface of the first pattern.Type: ApplicationFiled: December 11, 2018Publication date: November 14, 2019Inventors: Seung-Soo HONG, Bo-Ra LIM, Geum-Jung SEONG, Young-Mook OH, Jeong-Yun LEE, Ah-Reum JI
-
Publication number: 20190273153Abstract: An integrated circuit device includes: a first fin active region extending in a first direction parallel to a top surface of a substrate; a second fin active region extending in the first direction and spaced apart from the first fin active region in a second direction different from the first direction; a gate line intersecting the first and second fin active regions; a first source/drain region on one side of the gate line in the first fin active region; and a second source/drain region on one side of the gate line in the second fin active region and facing the first source/drain region, wherein a cross-section of the first source/drain region perpendicular to the first direction has an asymmetric shape with respect to a center line of the first source/drain region in the second direction extending in a third direction perpendicular to the top surface of the substrate.Type: ApplicationFiled: May 21, 2019Publication date: September 5, 2019Inventors: Edward Namkyu CHO, Bo-ra LIM, Geum-jung SEONG, Seung-hun LEE
-
Publication number: 20190245076Abstract: A semiconductor device includes a substrate having a fin active region pattern having a protruding shape, a device isolation layer pattern covering a side surface of a lower portion of the fin active region pattern, a spacer pattern covering a side surface of a portion of the fin active region pattern that protrudes from a top surface of the device isolation layer pattern, and a source/drain region in contact with a top surface of the fin active region pattern and a top surface of the spacer pattern.Type: ApplicationFiled: September 13, 2018Publication date: August 8, 2019Applicant: Samsung Electronics Co., Ltd.Inventors: Geum-jung SEONG, Bo-ra LIM, Jeong-yun LEE, Ah-reum JI
-
Patent number: 10319841Abstract: An integrated circuit device includes: a first fin active region extending in a first direction parallel to a top surface of a substrate; a second fin active region extending in the first direction and spaced apart from the first fin active region in a second direction different from the first direction; a gate line intersecting the first and second fin active regions; a first source/drain region on one side of the gate line in the first fin active region; and a second source/drain region on one side of the gate line in the second fin active region and facing the first source/drain region, wherein a cross-section of the first source/drain region perpendicular to the first direction has an asymmetric shape with respect to a center line of the first source/drain region in the second direction extending in a third direction perpendicular to the top surface of the substrate.Type: GrantFiled: January 12, 2018Date of Patent: June 11, 2019Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Edward Namkyu Cho, Bo-ra Lim, Geum-jung Seong, Seung-hun Lee
-
Publication number: 20190067455Abstract: An integrated circuit device includes: a first fin active region extending in a first direction parallel to a top surface of a substrate; a second fin active region extending in the first direction and spaced apart from the first fin active region in a second direction different from the first direction; a gate line intersecting the first and second fin active regions; a first source/drain region on one side of the gate line in the first fin active region; and a second source/drain region on one side of the gate line in the second fin active region and facing the first source/drain region, wherein a cross-section of the first source/drain region perpendicular to the first direction has an asymmetric shape with respect to a center line of the first source/drain region in the second direction extending in a third direction perpendicular to the top surface of the substrate.Type: ApplicationFiled: January 12, 2018Publication date: February 28, 2019Inventors: Edward Namkyu CHO, Bo-ra LIM, Geum-jung SEONG, Seung-hun LEE
-
Patent number: 10212488Abstract: A channel-based method and system for relaying contents are disclosed. The content relaying method generates a channel on the basis of a user terminal or a specific group adjacent to a display device and can relay, to the display device, a screen for executing the contents displayed on the user terminal when the user terminal accesses the generated channel.Type: GrantFiled: October 22, 2014Date of Patent: February 19, 2019Assignee: KAKAO CORP.Inventors: Seung Hwan Van, Doo Shik Chung, Bo Ra Lim
-
Patent number: 10171886Abstract: A channel-based method and system for relaying contents are disclosed. The content relaying method generates a channel on the basis of a user terminal or a specific group adjacent to a display device and can relay, to the display device, a screen for executing the contents displayed on the user terminal when the user terminal accesses the generated channel.Type: GrantFiled: October 22, 2014Date of Patent: January 1, 2019Assignee: KAKAO CORP.Inventors: Seung Hwan Van, Doo Shik Chung, Bo Ra Lim
-
Publication number: 20180294331Abstract: A semiconductor device includes: a fin-type active region protruding from a substrate and extending in a first direction; at least one nano-sheet spaced apart from an upper surface of the fin-type active region and facing the upper surface of the fin-type active region, the at least one nano-sheet having a channel region; a gate extending on the fin-type active region in a second direction crossing the first direction and surrounding at least a portion of the at least one nano-sheet; a source/drain region on the fin-type active region on both sides of the at least one nano-sheet; and a source/drain protection layer on a sidewall of the at least one nano-sheet and between the source/drain region and the at least one nano-sheet.Type: ApplicationFiled: November 28, 2017Publication date: October 11, 2018Inventors: Edward Nam-kyu Cho, Tae-soon Kwon, Bo-ra Lim, Jeong-yun Lee
-
Patent number: 10002967Abstract: Semiconductor devices as described herein may include a fin-shaped pattern extending in a first direction, first and second side walls facing each other, first and second gate electrodes extending in a second direction and spaced apart from each other, a first gate spacer that is on a side wall of the first gate electrode, a second gate spacer that is on a side wall of the second gate electrode, a first trench in the fin-shaped pattern that is between the first and second gate electrodes and having a first width, and a second trench in the fin-shaped pattern that is below the first trench and has a second width smaller than the first width. The fin-shaped pattern may include first and second inflection points on the side walls of the fin-shaped pattern, and a bottom surface of the second trench may be lower than the inflection points.Type: GrantFiled: May 23, 2017Date of Patent: June 19, 2018Assignee: Samsung Electronics Co., Ltd.Inventors: Seung Soo Hong, Jeong Yun Lee, Kyung Seok Min, Seung Ju Park, Geum Jung Seong, Bo Ra Lim
-
Publication number: 20180069125Abstract: Semiconductor devices as described herein may include a fin-shaped pattern extending in a first direction, first and second side walls facing each other, first and second gate electrodes extending in a second direction and spaced apart from each other, a first gate spacer that is on a side wall of the first gate electrode, a second gate spacer that is on a side wall of the second gate electrode, a first trench in the fin-shaped pattern that is between the first and second gate electrodes and having a first width, and a second trench in the fin-shaped pattern that is below the first trench and has a second width smaller than the first width. The fin-shaped pattern may include first and second inflection points on the side walls of the fin-shaped pattern, and a bottom surface of the second trench may be lower than the inflection points.Type: ApplicationFiled: May 23, 2017Publication date: March 8, 2018Inventors: Seung Soo Hong, Jeong Yun Lee, Kyung Seok Min, Seung Ju Park, Geum Jung Seong, Bo Ra Lim
-
Patent number: 9904980Abstract: A display apparatus including: a display; and a controller configured to detect an object in an input image, divide the image into a first region of the image corresponding to a location of the detected object and a second region of the image corresponding to a region of the input image excluding the first region, adjust the first region and the second region using different scale factors, and control the display to display the image having the adjusted first and second regions.Type: GrantFiled: June 19, 2015Date of Patent: February 27, 2018Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Bo Ra Lim, Seon-seok Kim
-
Patent number: 9876013Abstract: A semiconductor device is provided including first and second active fin arrays on a substrate. The semiconductor device further includes a pair of first gate spacers disposed on the first and second active fin arrays, each of the pair of first gate spacers including a first region having a first width, a second region having a second width, and a third region between the first region and the second region and having a third width; and first and second gate electrodes, the first gate electrode disposed between the first regions and the second gate electrode disposed between the second regions. The first regions are on the first active fin array, the second regions are on the second active fin array, and the third regions are between the first active fin array and the second active fin array. Each of the first and second widths is greater than the third width.Type: GrantFiled: April 3, 2017Date of Patent: January 23, 2018Assignee: Samsung Electronics Co., Ltd.Inventors: Seung Ju Park, Jeong Yun Lee, Kyung Seok Min, Geum Jung Seong, Bo Ra Lim, Seung Soo Hong
-
Publication number: 20160360287Abstract: A channel-based method and system for relaying contents are disclosed. The content relaying method generates a channel on the basis of a user terminal or a specific group adjacent to a display device and can relay, to the display device, a screen for executing the contents displayed on the user terminal when the user terminal accesses the generated channel.Type: ApplicationFiled: October 22, 2014Publication date: December 8, 2016Inventors: Seung Hwan VAN, Doo Shik CHUNG, Bo Ra LIM
-
Publication number: 20160063673Abstract: A display apparatus including: a display; and a controller configured to detect an object in an input image, divide the image into a first region of the image corresponding to a location of the detected object and a second region of the image corresponding to a region of the input image excluding the first region, adjust the first region and the second region using different scale factors, and control the display to display the image having the adjusted first and second regions.Type: ApplicationFiled: June 19, 2015Publication date: March 3, 2016Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Bo Ra LIM, Seon-seok KIM
-
Patent number: 8131109Abstract: Provided are an image processing method and apparatus for enhancing contrast. The image processing apparatus includes a determination unit that determines whether contrast enhancement processing should be performed on an input image; an intensity mapping unit that generates a plurality of images having different exposure times from the input image, using intensity mapping, if the contrast enhancement processing should be performed on the input image; and an image composition unit that composes the plurality of images into a composed image. Therefore, it is possible to reduce a color change or a false contour phenomenon that are generated in a related art contrast enhancement process.Type: GrantFiled: June 11, 2007Date of Patent: March 6, 2012Assignees: Samsung Electronics Co., Ltd., Industry-University Cooperation Foundation Sogang UniversityInventors: Sung-hee Kim, Seung-joon Yang, Rae-hong Park, Bo-ra Lim
-
Patent number: 7986854Abstract: A method of improving picture quality in a composite video burst signal includes dividing the composite video burst signal into a plurality of frequency bands using a low pass filter and a high pass filter, performing wavelet packet filtering of frequency bands including a chrominance signal having energy higher than a specified threshold among the plurality of frequency bands, and performing Wiener filtering of frequency bands including a chrominance signal having energy lower than a specified threshold.Type: GrantFiled: June 11, 2007Date of Patent: July 26, 2011Assignees: Industry-University Cooperation Foundation Sogang University, Samsung Electronics Co., Ltd.Inventors: Sung-hee Kim, Seung-Joon Yang, Rae-hong Park, Ji-won Lee, Hyun-seung Lee, Jun-young Kim, Bo-ra Lim