Patents by Inventor Boris Boutillier

Boris Boutillier has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9471538
    Abstract: The invention is a transaction interface protocol wherein the interface protocol has a transaction identifier signal in each of the request and response channels. It is used between a target network interface unit (NIU) master and an initiator NIU slave that are directly connected through a transaction interface. The target NIU response channel uses the transaction ID signal to identify the entry in a context array associated with the corresponding request. The coupling of target NIU and initiator NIU enable the formation of an on-chip interconnect comprising multiple network-on-chip (NoCs) wherein the topology of the interconnect is simpler, smaller, faster, and has lower latency.
    Type: Grant
    Filed: September 25, 2012
    Date of Patent: October 18, 2016
    Assignee: Qualcomm Technologies, Inc.
    Inventors: Philippe Boucard, Jean-Jacques Lecler, Boris Boutillier
  • Patent number: 9225665
    Abstract: The invention is a transaction interface protocol wherein the interface protocol has a transaction identifier signal in each of the request and response channels. It is used between a target network interface unit (NIU) master and an initiator NIU slave that are directly connected through a transaction interface. The target NIU response channel uses the transaction ID signal to identify the entry in a context array associated with the corresponding request. The coupling of target NIU and initiator NIU enable the formation of an on-chip interconnect comprising multiple network-on-chip (NoCs) wherein the topology of the interconnect is simpler, smaller, faster, and has lower latency.
    Type: Grant
    Filed: September 25, 2012
    Date of Patent: December 29, 2015
    Assignee: QUALCOMM TECHNOLOGIES, INC.
    Inventors: Philippe Boucard, Jean-Jacques Lecler, Boris Boutillier
  • Publication number: 20150019193
    Abstract: Verification IPs for the verification of semiconductor chip designs are designed to support specific interface protocols. Verification IP is expensive or unavailable to test devices with interfaces of uncommon protocols. Verification IP that uses a generic interface protocol, used in conjunction with simple adapters between interfaces of the VIP that use the generic protocol and interfaces of the device under test that use specific protocols, are reused to test interfaces with different specific protocols if the generic protocol supports a superset of the features of the specific protocols.
    Type: Application
    Filed: July 14, 2013
    Publication date: January 15, 2015
    Inventors: Boris BOUTILLIER, Jean-Jacques LECLER
  • Publication number: 20140086247
    Abstract: The invention is a transaction interface protocol wherein the interface protocol has a transaction identifier signal in each of the request and response channels. It is used between a target network interface unit (NIU) master and an initiator NIU slave that are directly connected through a transaction interface. The target NIU response channel uses the transaction ID signal to identify the entry in a context array associated with the corresponding request. The coupling of target NIU and initiator NIU enable the formation of an on-chip interconnect comprising multiple network-on-chip (NoCs) wherein the topology of the interconnect is simpler, smaller, faster, and has lower latency.
    Type: Application
    Filed: September 25, 2012
    Publication date: March 27, 2014
    Applicant: ARTERIS SAS
    Inventors: PHILIPPE BOUCARD, Jean-Jacques Lecler, Boris Boutillier
  • Publication number: 20140086246
    Abstract: The invention is a transaction interface protocol wherein the interface protocol has a transaction identifier signal in each of the request and response channels. It is used between a target network interface unit (NIU) master and an initiator NIU slave that are directly connected through a transaction interface. The target NIU response channel uses the transaction ID signal to identify the entry in a context array associated with the corresponding request. The coupling of target NIU and initiator NIU enable the formation of an on-chip interconnect comprising multiple network-on-chip (NoCs) wherein the topology of the interconnect is simpler, smaller, faster, and has lower latency.
    Type: Application
    Filed: September 25, 2012
    Publication date: March 27, 2014
    Applicant: ARTERIS SAS
    Inventors: PHILIPPE BOUCARD, Jean-Jacques Lecler, Boris Boutillier