Abstract: A first storage device provides a host device with access to a private memory area by communicating a password between the first storage device and a second storage device via the host device using a double-encryption scheme. In one embodiment, a host device receives a twice-encrypted password from a first storage device, sends the twice-encrypted password to a second storage device, receives a once-encrypted password from the second storage device, decrypts the once-encrypted password to obtain the password, and sends the password to the first storage device. In another embodiment, a first storage device sends a twice-encrypted password to a host device, receives the password from the host device after the twice-encrypted password is decrypted by a second storage device and the host device, and provides the host device with access to the private memory area only if the password matches one that is stored in the first storage device.

Abstract: A first storage device provides a host device with access to a private memory area by communicating a password between the first storage device and a second storage device via the host device using a double-encryption scheme. In one embodiment, a host device receives a twice-encrypted password from a first storage device, sends the twice-encrypted password to a second storage device, receives a once-encrypted password from the second storage device, decrypts the once-encrypted password to obtain the password, and sends the password to the first storage device. In another embodiment, a first storage device sends a twice-encrypted password to a host device, receives the password from the host device after the twice-encrypted password is decrypted by a second storage device and the host device, and provides the host device with access to the private memory area only if the password matches one that is stored in the first storage device.

Abstract: A method for data integrity protection includes arranging in an integrity hierarchy a plurality of data blocks, which contain data. The integrity hierarchy includes multiple levels of signature blocks containing signatures computed respectively over lower levels in the hierarchy, wherein the levels culminate in a top-level block containing a top-level signature computed over the hierarchy. A modification to be made in the data stored in a given data block is received. One or more of the signatures is recomputed in response to the modification, including the top-level signature. Copies of the given data block, and of the signature blocks, including a copy of the top-level block, are stored in respective locations in a storage medium. An indication that the copy is a valid version of the top-level block is recorded in the copy of the top-level block.

Abstract: A method for storing data includes providing a memory package including an integrated circuit containing a non-volatile memory and counter circuitry. The data is written to the non-volatile memory. The counter circuitry is operated to maintain a count of write operations performed on the non-volatile memory. The data and the count from the memory package are received at a controller, separate from the memory package, and the data is authenticated in response to the count.

Abstract: A method and memory device for implementing long operations and supporting multiple streams are provided. In one embodiment, a memory device receives data and a command from a host to perform an operation on the data, wherein a time required for the memory device to complete the operation exceeds a maximum response time for the memory device to respond to the command. The memory device begins performing the operation on the data and, before exceeding the maximum response time and before completing the operation, sends the context of the operation to the host. At a later time, the memory device receives from the host: (i) a command to resume performing the operation and (ii) the context. The memory device then resumes performing the operation on the data based on the context received from the host.

Abstract: Systems and methods for accessing data at a data storage device are disclosed. In a particular embodiment, a method includes receiving cluster information at a controller of a data storage device, the data storage device further including a memory, the cluster information being associated with a data file that is stored at the memory. The method also includes accessing the cluster information to locate at least one region of the memory corresponding to the data file. The method further includes accessing data from the data file at the at least one region of the memory that is identified by the cluster information. Accessing of data from the data file includes the controller executing an internal application.

Abstract: A signed multiplication method and a corresponding device for multiplying a first multiplicand with a second multiplicand. The device stores the first multiplicand in a first register as a first vector of at least one respective digit and storing the second multiplicand in a second register as a second vector of at least one respective digit, each digit having a pre-determined number of bits. The method further converts the digits of the first vector and the second vector to corresponding digits of one bit less each than the pre-determined number of bits. A processor effects signed multiplication of the multiplicands.

Abstract: A method for protecting information in a device includes providing a device with a non-secure hardware domain, a processor having a software-controlled mode of operation, and a secure hardware domain having a secure memory that is inaccessible by the processor when the processor is operating in the software-controlled mode of operation. Data from the non-secure hardware domain is established in the secure hardware domain. Computing operations are executed on the data in the secure hardware domain to produce a result. The secure hardware domain is purged, while retaining the result therein. The result is thereafter returned from the secure hardware domain into the non-secure hardware domain.

Abstract: A method for storing data includes providing a memory package including an integrated circuit containing a non-volatile memory and counter circuitry. The data is written to the non-volatile memory. The counter circuitry is operated to maintain a count of write operations performed on the non-volatile memory. The data and the count from the memory package are received at a controller, separate from the memory package, and the data is authenticated in response to the count.

Abstract: A method for data storage includes employing a first CPU to execute code from a ROM associated therewith. A second CPU is employed to upload code from a flash memory to a code RAM associated with the first CPU, while the first CPU is available to perform other tasks.

Abstract: A method for random number generation includes generating random number sequences using a Random Number Generator (RNG) circuit having an externally-modifiable configuration. The RNG circuit generates a first random number sequence having a first measure of randomness, and modifies the configuration of the RNG circuit, causing the RNG circuit to generate a second random number sequence having a second measure of the randomness, indicating a degree of the randomness that is no less than the first measure.

Abstract: Side channel attacks against a computing device are prevented by combinations of scrambling data to be stored in memory and scrambling the memory addresses of the data using software routines to execute scrambling and descrambling functions. Encrypted versions of variables, data and lookup tables, commonly employed in cryptographic algorithms, are thus dispersed into pseudorandom locations. Data and cryptographic primitives that require data-dependent memory accesses are thus shielded from attacks that could reveal memory access patterns and compromise cryptographic keys.

Abstract: A method for data integrity protection includes arranging in an integrity hierarchy a plurality of data blocks, which contain data. The integrity hierarchy includes multiple levels of signature blocks containing signatures computed respectively over lower levels in the hierarchy, wherein the levels culminate in a top-level block containing a top-level signature computed over the hierarchy. A modification to be made in the data stored in a given data block is received. One or more of the signatures is recomputed in response to the modification, including the top-level signature. Copies of the given data block, and of the signature blocks, including a copy of the top-level block, are stored in respective locations in a storage medium. An indication that the copy is a valid version of the top-level block is recorded in the copy of the top-level block.

Abstract: A method for protection of data includes maintaining a control parameter indicative of a current version of the data. The data is partitioned into multiple segments. Respective signatures of the segments are computed, responsively to the control parameter, the segments and respective signatures forming respective signed input segments, which are stored in a memory. After the signed input segments are stored, a signed output segment is fetched from the memory. The signature of the signed output segment is verified responsively to the control parameter, and the data in the signed output segment is processed responsively to verifying the signature.

Abstract: A method for data storage includes supplying data to and from a host to a storage memory via a secure data path. A first CPU is employed to control operation of the storage memory, and a second CPU is employed to control operation of the secure data path.

Abstract: A method for data cryptography includes accepting input data, which contains a section that is to undergo a cryptographic operation and starts at an offset with respect to a beginning of the input data, by a Direct Memory Access (DMA) module. The input data is aligned by the DMA module to cancel out the offset. The aligned input data is read out of the DMA module, and the cryptographic operation is performed on the section.

Abstract: A counting device includes a set of memory cells, including multiple groups of the memory cells configured to store count words of a count code, which include a less significant word and a more significant word. A controller assigns first and second groups of the memory cells to store the less significant word and the more significant word. The controller increments the less significant word from an initial value up to a first limit in each plurality of successive first iterations and increments the more significant word from an initial value up to a second limit in each of a plurality of successive second iterations in response to reaching the first limit. Upon reaching the second limit, the controller makes a new assignment of the groups of the memory cells that are to store the less significant word and the more significant word.

Abstract: The present invention discloses methods for protecting data integrity of updatable data against unauthorized modification. A method for protecting data integrity of updatable data in a storage system, the method including the steps of: storing a data copy of the data in the storage system; upon storing the data copy, transforming the data copy into at least one transformed copy of the data; storing at least one transformed copy in the storage system; upon a request to read the data, reading the data copy and at least one transformed copy; transform-comparing the data copy and at least one transformed copy; and designating the data integrity of the data as verified contingent upon the data copy and at least one transformed copy being identical.

Abstract: A signed multiplication method and a corresponding device for multiplying a first multiplicand with a second multiplicand. The device stores the first multiplicand in a first register as a first vector of at least one respective digit and storing the second multiplicand in a second register as a second vector of at least one respective digit, each digit having a pre-determined number of bits. The method further converts the digits of the first vector and the second vector to corresponding digits of one bit less each than the pre-determined number of bits. A processor effects signed multiplication of the multiplicands.