Abstract: For use in an information processing system 10, the system including a system bus 16 having a system address bus 16a and a system data bus 16b and at least two data processors 12 and 14 coupled to the system bus, emulation apparatus for enabling a first one of the data processors to execute, in conjunction with a second one of the data processors, a program requiring access to predetermined address locations associated with a specific type of device, typically an I/O device. The specific type of device is either not resident within the system or is resident at different address locations. The emulation apparatus includes circuitry 30 for detecting an occurrence of an access cycle by the first data processor to the predetermined address location, circuitry 50 for halting the first data processor before completion of the access cycle and circuitry 50 for notifying the second data processor that the first data processor is halted.