Abstract: In some embodiments, an apparatus includes a tester having de-embedding logic and analysis logic. The de-embedding logic is to receive a differential tester input signal in a time domain fashion and in response to the tester input signal to provide a differential de-embedded signal that is an estimate of a time domain differential channel input signal including first and second channel input signal components outside the tester. The tester input signal is responsive to the channel input signal, and the tester input signal includes first and second tester input signal components, and the de-embedded signal includes first and second de-embedded signal components. The analysis logic is to receive the de-embedded signal and draw conclusions about a device under test outside the tester providing the channel input signal. To provide the de-embedded signal, the de-embedding logic performs operations involving channel ABCD parameters, source impedance characteristics, and load impedance characteristics.