Patents by Inventor Boris Hudec

Boris Hudec has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Resistive random access memory having charge trapping layer, manufacturing method thereof, and operation thereof
    Patent number: 10236061
    Abstract: A resistive random access memory (RRAM) including a first electrode, a second electrode, and a charge trapping layer is provided. The second electrode is located on the first electrode. The charge trapping layer is located between the first electrode and the second electrode. The charge trapping includes a first region and a second region. The first region has a first dopant and is close to the first electrode. The second region has a second dopant and is close to the second electrode.
    Type: Grant
    Filed: April 11, 2017
    Date of Patent: March 19, 2019
    Assignee: Winbond Electronics Corp.
    Inventors: Tuo-Hung Hou, Boris Hudec, Che-Chia Chang
  • RESISTIVE RANDOM ACCESS MEMORY, MANUFACTURING METHOD THEREOF, AND OPERATION THEREOF
    Publication number: 20180090207
    Abstract: A resistive random access memory (RRAM) including a first electrode, a second electrode, and a charge trapping layer is provided. The second electrode is located on the first electrode. The charge trapping layer is located between the first electrode and the second electrode. The charge trapping includes a first region and a second region. The first region has a first dopant and is close to the first electrode. The second region has a second dopant and is close to the second electrode.
    Type: Application
    Filed: April 11, 2017
    Publication date: March 29, 2018
    Applicant: Winbond Electronics Corp.
    Inventors: Tuo-Hung Hou, Boris Hudec, Che-Chia Chang