Abstract: A III-V/SiNx hybrid integrated photonics platform is described. A wafer can include regions where SiNx waveguides are formed and regions where III-V waveguides have been grown heteroepitaxially from the Si substrate and formed lithographically to butt couple to the SiNx waveguides. Efficient optical coupling is possible between the SiNx and III-V waveguides (?2.5 dB loss/transition). A threading dislocation density (TDD) as low as 4×106 cm?2 can be obtained in the III-V waveguides. The TDD enables fully parallel fabrication of integrated III-V optoelectronic devices, allowing for complex photonic integrated circuits with many active components.

Abstract: An integrated optical beam steering device includes a planar Luneburg lens that collimates beams from different inputs in different directions within the lens plane. It also includes a curved (e.g., semi-circular or arced) grating coupler that diffracts the collimated beams out of the lens plane. The beams can be steered in the plane by controlling the direction along which the lens is illuminated and out of the plane by varying the beam wavelength. Unlike other beam steering devices, this device can operate over an extremely wide field of view—up to 180°—without any aberrations off boresight. In other words, the beam quality is uniform in all directions, unlike with aplanatic lenses, thanks to the circular symmetry of the planar Luneburg lens, which may be composed of subwavelength features. The lens is also robust to misalignment and fabrication imperfections and can be made using standard CMOS processes.

Abstract: Photonic integrated circuits (PICs) enable manipulation of light on a chip for telecommunications and information processing. They can be made with silicon and silicon-compatible materials using complementary metal-oxide-semiconductor (CMOS) fabrication techniques developed for making electronics. Unfortunately, most light sources are made with III-V and II-VI materials, which are not compatible with silicon CMOS fabrication techniques. As a result, the light source for a PIC is either off-chip or integrated onto the PIC after CMOS fabrication is over. Hybrid integration can be improved by forming a recess in the PIC to receive a III-V or II-VI photonic chip. Mechanical stops formed in or next to the recess during fabrication align the photonic chip vertically to the PIC. Fiducials on the PIC and the photonic chip enable sub-micron lateral alignment. As a result, the photonic chip can be flip-chip bonded to the PIC with sub-micron vertical and lateral alignment precision.

Abstract: An integrated optical beam steering device includes a planar Luneburg lens that collimates beams from different inputs in different directions within the lens plane. It also includes a curved (e.g., semi-circular or arced) grating coupler that diffracts the collimated beams out of the lens plane. The beams can be steered in the plane by controlling the direction along which the lens is illuminated and out of the plane by varying the beam wavelength. Unlike other beam steering devices, this device can operate over an extremely wide field of view—up to 180°—without any aberrations off boresight. In other words, the beam quality is uniform in all directions, unlike with aplanatic lenses, thanks to the circular symmetry of the planar Luneburg lens, which may be composed of subwavelength features. The lens is also robust to misalignment and fabrication imperfections and can be made using standard CMOS processes.

Abstract: An integrated optical beam steering device includes a planar Luneburg lens that collimates beams from different inputs in different directions within the lens plane. It also includes a curved (e.g., semi-circular or arced) grating coupler that diffracts the collimated beams out of the lens plane. The beams can be steered in the plane by controlling the direction along which the lens is illuminated and out of the plane by varying the beam wavelength. Unlike other beam steering devices, this device can operate over an extremely wide field of view—up to 180°—without any aberrations off boresight. In other words, the beam quality is uniform in all directions, unlike with aplanatic lenses, thanks to the circular symmetry of the planar Luneburg lens, which may be composed of subwavelength features. The lens is also robust to misalignment and fabrication imperfections and can be made using standard CMOS processes.

Abstract: An integrated optical beam steering device includes a planar Luneburg lens that collimates beams from different inputs in different directions within the lens plane. It also includes a curved (e.g., semi-circular or arced) grating coupler that diffracts the collimated beams out of the lens plane. The beams can be steered in the plane by controlling the direction along which the lens is illuminated and out of the plane by varying the beam wavelength. Unlike other beam steering devices, this device can operate over an extremely wide field of view—up to 180°—without any aberrations off boresight. In other words, the beam quality is uniform in all directions, unlike with aplanatic lenses, thanks to the circular symmetry of the planar Luneburg lens, which may be composed of subwavelength features. The lens is also robust to misalignment and fabrication imperfections and can be made using standard CMOS processes.

Abstract: Photonic integrated circuits (PICs) enable manipulation of light on a chip for telecommunications and information processing. They can be made with silicon and silicon-compatible materials using complementary metal-oxide-semiconductor (CMOS) fabrication techniques developed for making electronics. Unfortunately, most light sources are made with III-V and II-VI materials, which are not compatible with silicon CMOS fabrication techniques. As a result, the light source for a PIC is either off-chip or integrated onto the PIC after CMOS fabrication is over. Hybrid integration can be improved by forming a recess in the PIC to receive a III-V or II-VI photonic chip. Mechanical stops formed in or next to the recess during fabrication align the photonic chip vertically to the PIC. Fiducials on the PIC and the photonic chip enable sub-micron lateral alignment. As a result, the photonic chip can be flip-chip bonded to the PIC with sub-micron vertical and lateral alignment precision.

Abstract: Embodiments of the invention are directed to structures in a vertical light emitting device that prevent light from being generated beneath absorbing structures, and/or direct light away from absorbing structures. Embodiments of the invention include a semiconductor structure including a light emitting layer disposed between an n-type region and a p-type region. A bottom contact is disposed on a bottom surface of the semiconductor structure. The bottom contact is electrically connected to one of the n-type region and the p-type region. A top contact is disposed on a top surface of the semiconductor structure. The top contact is electrically connected to the other of the n-type region and the p-type region. The top contact includes a first side and a second side opposite the first side. A first trench is formed in the semiconductor structure beneath the first side of the top contact. A second trench is formed in the seminconductor structure beneath the second side of the top contact.

Abstract: The surface of a light emitting device is roughened to enhance the light extraction efficiency of the surface, but the amount of roughened area is selected to achieve a desired level of light extraction efficiency. Photo-lithographic techniques may be used to create a mask that limits the roughening to select areas of the light emitting surface. Because the amount of roughened area can be precisely controlled, the light extraction efficiency can be precisely controlled, substantially independent of the particular process used to roughen the surface. Additionally, the selective roughening of the surface may be used to achieve a desired light emission output pattern.

Abstract: The surface of a light emitting device is roughened to enhance the light extraction efficiency of the surface, but the amount of roughened area is selected to achieve a desired level of light extraction efficiency. Photo-lithographic techniques may be used to create a mask that limits the roughening to select areas of the light emitting surface. Because the amount of roughened area can be precisely controlled, the light extraction efficiency can be precisely controlled, substantially independent of the particular process used to roughen the surface. Additionally, the selective roughening of the surface may be used to achieve a desired light emission output pattern.

Abstract: Embodiments of the invention are directed to structures in a vertical light emitting device that prevent light from being generated beneath absorbing structures, and/or direct light away from absorbing structures. Embodiments of the invention include a semiconductor structure including a light emitting layer disposed between an n-type region and a p-type region. A bottom contact is disposed on a bottom surface of the semiconductor structure. The bottom contact is electrically connected to one of the n-type region and the p-type region. A top contact is disposed on a top surface of the semiconductor structure. The top contact is electrically connected to the other of the n-type region and the p-type region. The top contact includes a first side and a second side opposite the first side. A first trench is formed in the semiconductor structure beneath the first side of the top contact. A second trench is formed in the seminconductor structure beneath the second side of the top contact.

Abstract: A method for fabricating an epitaxial structure includes providing a wafer comprising one or more epitaxial layers. The wafer is divided into dice where the area between the dice are called streets. Each street has a slot formed on either side of the street. The slots penetrate through the epitaxial layer but not the substrate leaving a portion of the epitaxial layer intact between the slots creating a “W” shaped cross section. A protective layer is then formed on the wafer. A laser may be used to singulate the wafer in to individual dice. The laser divides each street between the slots. The barrier walls of the epitaxial layers protect the individual dice from debris created by laser separation.

Abstract: A method for fabricating an epitaxial structure includes providing a wafer comprising one or more epitaxial layers. The wafer is divided into dice where the area between the dice are called streets. Each street has a slot formed on either side of the street. The slots penetrate through the epitaxial layer but not the substrate leaving a portion of the epitaxial layer intact between the slots creating a “W” shaped cross section. A protective layer is then formed on the wafer. A laser may be used to singulate the wafer in to individual dice. The laser divides each street between the slots. The barrier walls of the epitaxial layers protect the individual dice from debris created by laser separation.

Abstract: The surface of a light emitting device is roughened to enhance the light extraction efficiency of the surface, but the amount of roughened area is selected to achieve a desired level of light extraction efficiency. Photo-lithographic techniques may be used to create a mask that limits the roughening to select areas of the light emitting surface. Because the amount of roughened area can be precisely controlled, the light extraction efficiency can be precisely controlled, substantially independent of the particular process used to roughen the surface. Additionally, the selective roughening of the surface may be used to achieve a desired light emission output pattern.

Abstract: An apparatus, device, system, and method for controlling the index of refraction of at least one layer of amorphous silicon-based film deposited on a substrate are disclosed. The apparatus, device, system and method include providing at least one volume of each of N2, SiH4, and He, and depositing the at least one layer of amorphous silicon-based film on the substrate by vapor deposition. The device may include a waveguide that includes at least one layer of amorphous silicon-based film, wherein the at least one layer of amorphous silicon-based film is deposited by vapor deposition using an at least one volume of each of N2, SiH4, and He.

Abstract: An apparatus, device, system, and method for controlling the index of refraction of at least one layer of amorphous silicon-based film deposited on a substrate are disclosed. The apparatus, device, system and method include providing at least one volume of each of N2, SiH4, and He, and depositing the at least one layer of amorphous silicon-based film on the substrate by vapor deposition. The device may include a waveguide that includes at least one layer of amorphous silicon-based film, wherein the at least one layer of amorphous silicon-based film is deposited by vapor deposition using an at least one volume of each of N2, SiH4, and He.

Abstract: An apparatus, device, system, and method for controlling the index of refraction of at least one layer of amorphous silicon-based film deposited on a substrate are disclosed. The apparatus, device, system and method include providing at least one volume of each of N2, SiH4, and He, and depositing the at least one layer of amorphous silicon-based film on the substrate by vapor deposition. The device may include a waveguide that includes at least one layer of amorphous silicon-based film, wherein the at least one layer of amorphous silicon-based film is deposited by vapor deposition using an at least one volume of each of N2, SiH4, and He.