Patents by Inventor Boris Rodrigues

Boris Rodrigues has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11923465
    Abstract: The present disclosure concerns a photodiode including at least one memory area, each memory area including at least two charge storage regions.
    Type: Grant
    Filed: December 17, 2020
    Date of Patent: March 5, 2024
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventors: Arnaud Tournier, Boris Rodrigues Goncalves, Frederic Lalanne
  • Publication number: 20230317744
    Abstract: A photodiode is formed in a semiconductor substrate having a first surface and a second surface. The semiconductor substrate includes a first N-type semiconductor region formed by epitaxial growth and a second N-type semiconductor region (that is more heavily doped than the first region) extending into the first N-type semiconductor region from the first surface. The dopant concentration of the first N-type semiconductor region gradually increases between the second surface and the first surface of the semiconductor substrate. An implanted heavily P-type doped region is formed in the second N-type semiconductor region at the first surface.
    Type: Application
    Filed: March 28, 2023
    Publication date: October 5, 2023
    Applicant: STMicroelectronics (Crolles 2) SAS
    Inventors: Boris RODRIGUES GONCALVES, Pascal FONTENEAU
  • Publication number: 20220320359
    Abstract: An electronic device is provided that includes a photodiode. The photodiode includes a semiconductor region coupled to a node of application of a first voltage, and at least one semiconductor wall. The at least one semiconductor wall extends along at least a height of the photodiode and partially surrounds the semiconductor region.
    Type: Application
    Filed: June 23, 2022
    Publication date: October 6, 2022
    Applicant: STMicroelectronics (Crolles 2) SAS
    Inventors: Arnaud TOURNIER, Boris RODRIGUES GONCALVES, Francois ROY
  • Patent number: 11444110
    Abstract: A pixel includes a photoconversion zone, an insulated vertical electrode and at least one charge storage zone. The photoconversion zone belongs to a first part of a semiconductor substrate and each charge storage zone belongs to a second part of the substrate physically separated from the first part of the substrate by the insulated vertical electrode.
    Type: Grant
    Filed: April 8, 2021
    Date of Patent: September 13, 2022
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventors: Boris Rodrigues Goncalves, Frederic Lalanne
  • Patent number: 11417789
    Abstract: An electronic device is provided that includes a photodiode. The photodiode includes a semiconductor region coupled to a node of application of a first voltage, and at least one semiconductor wall. The at least one semiconductor wall extends along at least a height of the photodiode and partially surrounds the semiconductor region.
    Type: Grant
    Filed: March 20, 2020
    Date of Patent: August 16, 2022
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventors: Arnaud Tournier, Boris Rodrigues Goncalves, Francois Roy
  • Publication number: 20210343766
    Abstract: A pixel includes a photoconversion zone, an insulated vertical electrode and at least one charge storage zone. The photoconversion zone belongs to a first part of a semiconductor substrate and each charge storage zone belongs to a second part of the substrate physically separated from the first part of the substrate by the insulated vertical electrode.
    Type: Application
    Filed: April 8, 2021
    Publication date: November 4, 2021
    Applicant: STMicroelectronics (Crolles 2) SAS
    Inventors: Boris RODRIGUES GONCALVES, Frederic LALANNE
  • Patent number: 11107938
    Abstract: A photodiode include a first substrate layer of a first dopant type and a second substrate layer of a second dopant type on top of the first substrate layer. Semiconductor walls are provided in a semiconductor substrate which includes the first and second substrate layers. The semiconductor walls include: two outer semiconductor walls and at least one inside semiconductor wall positioned between the two outer semiconductor walls. Each inside semiconductor wall is located between two semiconductor walls having longer length.
    Type: Grant
    Filed: February 13, 2020
    Date of Patent: August 31, 2021
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventors: Boris Rodrigues Goncalves, Arnaud Tournier
  • Publication number: 20210193849
    Abstract: The present disclosure concerns a photodiode including at least one memory area, each memory area including at least two charge storage regions.
    Type: Application
    Filed: December 17, 2020
    Publication date: June 24, 2021
    Inventors: Arnaud TOURNIER, Boris RODRIGUES GONCALVES, Frederic LALANNE, Pascal FONTENEAU
  • Publication number: 20200313023
    Abstract: An electronic device is provided that includes a photodiode. The photodiode includes a semiconductor region coupled to a node of application of a first voltage, and at least one semiconductor wall. The at least one semiconductor wall extends along at least a height of the photodiode and partially surrounds the semiconductor region.
    Type: Application
    Filed: March 20, 2020
    Publication date: October 1, 2020
    Inventors: Arnaud TOURNIER, Boris RODRIGUES GONCALVES, Francois ROY
  • Publication number: 20200266310
    Abstract: A photodiode include a first substrate layer of a first dopant type and a second substrate layer of a second dopant type on top of the first substrate layer. Semiconductor walls are provided in a semiconductor substrate which includes the first and second substrate layers. The semiconductor walls include: two outer semiconductor walls and at least one inside semiconductor wall positioned between the two outer semiconductor walls. Each inside semiconductor wall is located between two semiconductor walls having longer length.
    Type: Application
    Filed: February 13, 2020
    Publication date: August 20, 2020
    Applicant: STMicroelectronics (Crolles 2) SAS
    Inventors: Boris RODRIGUES GONCALVES, Arnaud TOURNIER
  • Patent number: 10613202
    Abstract: A pixel is formed on a semiconductor substrate that includes a photosensitive area having a first doped layer and a charge collection area of a first conductivity type extending through at least part of the first doped layer. At least two charge storage areas, each including a well of the first conductivity type, are separated from the charge collection area at least by a first portion of the first layer. The first portion is covered by a first gate. Each charge storage area is laterally delimited by two insulated conductive electrodes. A second doped layer of the second conductivity type covers the charge collection area and the charge storage areas.
    Type: Grant
    Filed: November 19, 2018
    Date of Patent: April 7, 2020
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventors: Francois Roy, Boris Rodrigues Goncalves, Marie Guillon, Yvon Cazaux, Benoit Giffard
  • Patent number: 10488499
    Abstract: A time-of-flight detection pixel includes a photosensitive area including a first doped layer and a charge collection area extending in the first doped layer. At least two charge storage areas extend from the charge collection area, each including a first well more heavily doped than the charge collection area and separated from the charge collection area by a first portion of the first doped layer which is coated with a gate. Each charge storage area is laterally delimited by two insulated conductive electrodes, extending parallel to each other and facing each other. A second heavily doped layer of opposite conductivity coats the pixel except for at each portion of the first doped layer coated with the gate.
    Type: Grant
    Filed: December 22, 2016
    Date of Patent: November 26, 2019
    Assignees: STMicroelectronics (Crolles 2) SAS, Commissariat A L'Energie Atomique et aux Energies Alternatives
    Inventors: Francois Roy, Marie Guillon, Yvon Cazaux, Boris Rodrigues, Alexis Rochas
  • Publication number: 20190086519
    Abstract: A pixel is formed on a semiconductor substrate that includes a photosensitive area having a first doped layer and a charge collection area of a first conductivity type extending through at least part of the first doped layer. At least two charge storage areas, each including a well of the first conductivity type, are separated from the charge collection area at least by a first portion of the first layer. The first portion is covered by a first gate. Each charge storage area is laterally delimited by two insulated conductive electrodes. A second doped layer of the second conductivity type covers the charge collection area and the charge storage areas.
    Type: Application
    Filed: November 19, 2018
    Publication date: March 21, 2019
    Applicant: STMicroelectronics (Crolles 2) SAS
    Inventors: Francois Roy, Boris Rodrigues Goncalves, Marie Guillon, Yvon Cazaux, Benoit Giffard
  • Patent number: 10162048
    Abstract: A pixel is formed on a semiconductor substrate that includes a photosensitive area having a first doped layer and a charge collection area of a first conductivity type extending through at least part of the first doped layer. At least two charge storage areas, each including a well of the first conductivity type, are separated from the charge collection area at least by a first portion of the first layer. The first portion is covered by a first gate. Each charge storage area is laterally delimited by two insulated conductive electrodes. A second doped layer of the second conductivity type covers the charge collection area and the charge storage areas.
    Type: Grant
    Filed: December 28, 2016
    Date of Patent: December 25, 2018
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventors: Francois Roy, Boris Rodrigues, Marie Guillon, Yvon Cazaux, Benoit Giffard
  • Publication number: 20170192090
    Abstract: A time-of-flight detection pixel includes a photosensitive area including a first doped layer and a charge collection area extending in the first doped layer. At least two charge storage areas extend from the charge collection area, each including a first well more heavily doped than the charge collection area and separated from the charge collection area by a first portion of the first doped layer which is coated with a gate. Each charge storage area is laterally delimited by two insulated conductive electrodes, extending parallel to each other and facing each other. A second heavily doped layer of opposite conductivity coats the pixel except for at each portion of the first doped layer coated with the gate.
    Type: Application
    Filed: December 22, 2016
    Publication date: July 6, 2017
    Applicants: STMicroelectronics (Crolles 2) SAS, Commissariat A L'Energie Atomique et aux Energies Alternatives
    Inventors: Francois Roy, Marie Guillon, Yvon Cazaux, Boris Rodrigues, Alexis Rochas
  • Publication number: 20170194368
    Abstract: A pixel is formed on a semiconductor substrate that includes a photosensitive area having a first doped layer and a charge collection area of a first conductivity type extending through at least part of the first doped layer. At least two charge storage areas, each including a well of the first conductivity type, are separated from the charge collection area at least by a first portion of the first layer. The first portion is covered by a first gate. Each charge storage area is laterally delimited by two insulated conductive electrodes. A second doped layer of the second conductivity type covers the charge collection area and the charge storage areas.
    Type: Application
    Filed: December 28, 2016
    Publication date: July 6, 2017
    Applicants: STMicroelectronics (Crolles 2) SAS, Commissariat A L'Energie Atomique et aux Energies Alternatives
    Inventors: Francois Roy, Boris Rodrigues, Marie Guillon, Yvon Cazaux, Benoit Giffard