Abstract: A controllable inductor system includes a multiphase inductor comprising a central winding, a first control winding, and a second control winding, and a control portion comprising a first control logic portion operative to receive a signal indicative of a current of the first control winding and a signal indicative of a current of the sum of the first control winding and the second control winding and modulate a first pulse width modulated signal to responsively control a first transistor connected to the first control winding, and a second control logic portion operative to receive the signal indicative of the current of the first control winding and a signal indicative of a current of the sum of the first control winding and the second control winding and modulate a second pulse width modulated signal to responsively control a second transistor connected to the second control winding.

Abstract: A reconfigurable multi-cell power converter and method wherein a set of cells are connected between an input bus and a load in an input series output parallel configuration or in an input parallel output series configuration. Each cell includes a primary side reconfigurable between series and parallel operation and a secondary side also reconfigurable between series and parallel operation. Switching circuitry is configured to reconfigure the primary side of each cell between series and parallel operation and vice versa and also to reconfigure the secondary side of each cell between series and parallel operation and vice versa. A controller is configured to actuate the switching circuitry depending a voltage on the input bus and/or cell condition to reconfigure all the cell primary sides and/or secondary sides while maintaining a desired input series output parallel or input parallel output series connection for the set of cells.

Abstract: An improved planar magnetic structure in which the voltage gradient between core and windings is reduced by shields disposed between the one or more legs of the core and the windings and extending through the PWB layers; vias are offset to permit them to be contained within the path of the winding; and the induced magnetic and eddy currents intrinsic to interstitial shield layers are reduced by configuring the shield conductors with pairs of courses with opposite and offsetting current propagation.

Abstract: A device including a controllable semiconductor, sensor, and controller is provided. The controllable semiconductor is associated with a first operating parameter and a second operating parameter, wherein at least the first operating parameter is controllable. The sensor is in communication with the controllable semiconductor device and acquires data relating to the second operating parameter of the controllable semiconductor device. The controller is in communication with the controllable semiconductor device and the sensor, and the controller is configured to access device data associated with the controllable semiconductor, control the first operating parameter of the controllable semiconductor, and receive data from the first sensor relating to the second operating parameter.

Abstract: An intelligent power system includes one or more common power sources and one or more subsystem components interconnected with the common power sources. Each common power source includes an unregulated bus, a plurality of power source regulated buses, each regulated bus originating at a common power source and terminating at a respective one of k load subsystems, a power source, first, second, third and fourth groups of switches, a regulator having a plurality of outputs and an energy storage element. The regulator is configured to provide a time-shared mode of operation to provide power sequentially to one or more of the k load subsystems, such that the time intervals when the regulator is connected to any one of the k load subsystems do not overlap, and where the regulator is configured to switch in supplemental power from the energy storage, if necessary, to ensure that an average power delivered by the regulator does not exceed the average power consumed by all of the k load subsystems.

Abstract: A method of providing power to a load is provided. A first series resonant converter is provided. A second SRC is operably coupled to the first SRC in a cascade connected arrangement. First and second zero voltage switching (ZVS)-assistance networks are operably coupled between the first SRC and the second SRC, such that the first and second ZVS-assistance networks are providing first and second ZVS-assistant currents flowing from each ZVS-assistance network to the cascade connected arrangement of SRCs. Power from a power source is received at the cascade connected arrangement of first and second SRCs, power from a power source. The cascade connected arrangement of first and second SRCs supplies an output voltage to the load in response to receiving power from the power source.

Abstract: A device including a controllable semiconductor, sensor, and controller is provided. The controllable semiconductor is associated with a first operating parameter and a second operating parameter, wherein at least the first operating parameter is controllable. The sensor is in communication with the controllable semiconductor device and acquires data relating to the second operating parameter of the controllable semiconductor device. The controller is in communication with the controllable semiconductor device and the sensor, and the controller is configured to access device data associated with the controllable semiconductor, control the first operating parameter of the controllable semiconductor, and receive data from the first sensor relating to the second operating parameter.

Abstract: An intelligent power system includes one or more common power sources and one or more subsystem components interconnected with the common power sources. Each common power source includes an unregulated bus, a plurality of power source regulated buses, each regulated bus originating at a common power source and terminating at a respective one of k load subsystems, a power source, first, second, third and fourth groups of switches, a regulator having a plurality of outputs and an energy storage element. The regulator is configured to provide a time-shared mode of operation to provide power sequentially to one or more of the k load subsystems, such that the time intervals when the regulator is connected to any one of the k load subsystems do not overlap, and where the regulator is configured to switch in supplemental power from the energy storage, if necessary, to ensure that an average power delivered by the regulator does not exceed the average power consumed by all of the k load subsystems.

Abstract: A reconfigurable multi-cell power converter and method wherein a set of cells are connected between an input bus and a load in an input series output parallel configuration or in an input parallel output series configuration. Each cell includes a primary side reconfigurable between series and parallel operation and a secondary side also reconfigurable between series and parallel operation. Switching circuitry is configured to reconfigure the primary side of each cell between series and parallel operation and vice versa and also to reconfigure the secondary side of each cell between series and parallel operation and vice versa. A controller is configured to actuate the switching circuitry depending a voltage on the input bus and/or cell condition to reconfigure all the cell primary sides and/or secondary sides while maintaining a desired input series output parallel or input parallel output series connection for the set of cells.

Abstract: Methods and apparatus for a circuit including first and second energy sources, a rectifier coupled to the first and second energy sources, first and second energy storage devices coupled end-to-end across the positive and negative rails, and a single three-level inverter coupled to the rectifier for providing three-phase sinusoidal output voltages.

Abstract: A device including a controllable semiconductor, sensor, and controller is provided. The controllable semiconductor is associated with a first operating parameter and a second operating parameter, wherein at least the first operating parameter is controllable. The sensor is in communication with the controllable semiconductor device and acquires data relating to the second operating parameter of the controllable semiconductor device. The controller is in communication with the controllable semiconductor device and the sensor, and the controller is configured to access device data associated with the controllable semiconductor, control the first operating parameter of the controllable semiconductor, and receive data from the first sensor relating to the second operating parameter.

Abstract: An improved planar magnetic structure in which the voltage gradient between core and windings is reduced by shields disposed between the one or more legs of the core and the windings and extending through the PWB layers; vias are offset to permit them to be contained within the path of the winding; and the induced magnetic and eddy currents intrinsic to interstitial shield layers are reduced by configuring the shield conductors with pairs of courses with opposite and offsetting current propagation.

Abstract: An intelligent power system includes one or more common power sources and one or more subsystem components interconnected with the common power sources. Each common power source includes a regulated bus, an unregulated bus, a sensor, a controller and a plurality of switches operated by the controller. A subsystem component includes a regulated bus, an unregulated bus, a power source, a sensor, a controller and a plurality of switches operated by the controller. With such a configuration, the system is able detect and isolate failed segments of the power system and is reconfigurable to restore power.

Abstract: An embedded core electrical transformer (120) for DC to DC current conversion at a switching frequency of 1 MHz has reduced volume and weight with increased power density. The electrical transformer (120) utilizes a plurality of conductive elements (132) disposed inside a hollow cavity (128) used to embed two magnetic cores (134, 136). The conductive elements (132) encircle three sides of the embedded cores (134, 136) and interface with a multilayer PCB (137) which includes conductive traces formed therein to encircle a fourth side of the embedded cores and to form primary and secondary winding circuits.

Abstract: Methods and apparatus for a circuit including first and second energy sources, a rectifier coupled to the first and second energy sources, first and second energy storage devices coupled end-to-end across the positive and negative rails, and a single three-level inverter coupled to the rectifier for providing three-phase sinusoidal output voltages.

Abstract: A method of providing power to a load is provided. A first series resonant converter is provided. A second SRC is operably coupled to the first SRC in a cascade connected arrangement. First and second zero voltage switching (ZVS)-assistance networks are operably coupled between the first SRC and the second SRC, such that the first and second ZVS-assistance networks are providing first and second ZVS-assistant currents flowing from each ZVS-assistance network to the cascade connected arrangement of SRCs. Power from a power source is received at the cascade connected arrangement of first and second SRCs, power from a power source. The cascade connected arrangement of first and second SRCs supplies an output voltage to the load in response to receiving power from the power source.

Abstract: A regenerative drive circuit for driving the gate of a power MOSFET of a switched mode power converter includes a pair of MOSFETS connected in series with a pair of coupled inductors L1, L2 and L3, L4 which are connected in parallel. A first blocking capacitor is connected in series with inductor L3 and a second blocking capacitor is connected in series with inductor L4. A positive voltage source is provided to one MOSFET and a negative voltage source is provided to the other MOSFET, and the gate drive circuit provides energy recovery.

Abstract: An intelligent power system includes one or more common power sources and one or more subsystem components interconnected with the common power sources. Each common power source includes a regulated bus, an unregulated bus, a sensor, a controller and a plurality of switches operated by the controller. A subsystem component includes a regulated bus, an unregulated bus, a power source, a sensor, a controller and a plurality of switches operated by the controller. With such a configuration, the system is able detect and isolate failed segments of the power system and is reconfigurable to restore power.

Abstract: An efficient power MOSFET resonant gate drive circuit having a large coupled inductor between and in series with two switching transistors. The inductor prevents cross-conduction from the power bus through the drive transistors as may be caused by simultaneous turn-on due either to switching delays or single-event-upset-radiation from energetic cosmic rays. In either case, the inductor presents a high impedance for current that tries to flow through both transistors simultaneously. A center tap on the inductor is connected to the gate of the power MOSFET. An equivalent inductance resonates with the equivalent capacitance of the gate of the power MOSFET providing fast turn-on of the power MOSFET. During turn-off of the power MOSFET, one drive transistor is switched-off and the other drive transistor is switched-on.

Abstract: A two-stage, Class E, fixed frequency, resonant, DC-to-DC power converter employing phase-shift control achieves outstanding performance over a full range from no load to full load. Each stage of the DC-to-DC power converter comprises a series inductor-diode network in parallel with a feed choke. Such network is connected between a power source input and a switching transistor, and it provides a fast discharge path for a resonant capacitor and lossless turn-on of the switching transistor in each power converter stage.