Patents by Inventor Boris SHARAV

Boris SHARAV has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240080023
    Abstract: An electronic circuit may include at least two capacitors arranged in parallel; at least two resistors arranged in series; a positive supply voltage connected to the resistors; a negative supply voltage connected to the resistors, the resistors producing a reference signal; a source circuit producing a source signal and connected to the positive supply voltage and negative supply voltage; and a receiving circuit connected to the positive supply voltage and negative supply voltage, and receiving the source signal and reference signal.
    Type: Application
    Filed: September 6, 2022
    Publication date: March 7, 2024
    Applicant: Mellanox Technologies Ltd.
    Inventor: Boris SHARAV
  • Patent number: 11742869
    Abstract: A transmitter including a digital-to-analog converter (DAC) to generate an analog output corresponding to a transmitted signal. The transmitter further includes an analog-to-digital converter (ADC) coupled to the DAC. The ADC measures the analog output of the DAC to identify a set of digital samples. The ADC identifies, from the set of digital samples, a set of valid samples, wherein each valid sample has a voltage within a voltage range. The ADC extracts one or more signal properties from the set of valid samples.
    Type: Grant
    Filed: January 11, 2022
    Date of Patent: August 29, 2023
    Assignee: Mellanox Technologies, Ltd.
    Inventors: Anthony Eugene Zortea, Hananel Faig, Boris Sharav, Mor Goren, Alik Gorshtein, Nir Sheffi
  • Publication number: 20230223946
    Abstract: A transmitter including a digital-to-analog converter (DAC) to generate an analog output corresponding to a transmitted signal. The transmitter further includes an analog-to-digital converter (ADC) coupled to the DAC. The ADC measures the analog output of the DAC to identify a set of digital samples. The ADC identifies, from the set of digital samples, a set of valid samples, wherein each valid sample has a voltage within a voltage range. The ADC extracts one or more signal properties from the set of valid samples.
    Type: Application
    Filed: January 11, 2022
    Publication date: July 13, 2023
    Inventors: Anthony Eugene Zortea, Hananel Faig, Boris Sharav, Mor Goren, Alik Gorshtein, Nir Sheffi
  • Patent number: 10314162
    Abstract: Apparatuses and associated methods are described that provide networking connections that reduce cross-talk and other interference in communications systems. The network connection includes a printed circuit board (PCB) that defines a first end, a second end, and a grounding region on a surface of the PCB proximate the first end. The network connection includes network connectors proximate the first end, soldering pad pairs proximate the second end, and electrical traces therebetween. At least a first soldering pad pair is offset from a second soldering pad pair with respect to an edge of the PCB at the second end, such that, in an operational configuration in which at least the first soldering pad pair and the second soldering pad pair receive a differential signal cable, each differential signal cable is supported by the PCB in a corresponding offset configuration thereby reducing cross-talk between the differential signal cables.
    Type: Grant
    Filed: July 13, 2018
    Date of Patent: June 4, 2019
    Assignee: MELLANOX TECHNOLOGIES, LTD.
    Inventors: Dor Oz, Uri Goffer-Dor, Boris Sharav
  • Patent number: 9775243
    Abstract: An optimized ground (GND) network connection is provided between a Quad Small Form-factor Pluggable (QSFP) connector and a printed circuit board (PCB). The optimized GND network creates a “GND Island” around the signal pads by adding GND cage around the signal pads (at the empty corridor and in front of QSFP pads) and GND TH (ground through hole) vias from both sides of signal pads (at the empty corridor and in front of QSFP pads).
    Type: Grant
    Filed: April 19, 2015
    Date of Patent: September 26, 2017
    Assignee: MELLANOX TECHNOLOGIES, LTD.
    Inventors: Boris Sharav, Yonatan Malkiman
  • Publication number: 20160309576
    Abstract: An optimized ground (GND) network connection is provided between a Quad Small Form-factor Pluggable (QSFP) connector and a printed circuit board (PCB). The optimized GND network creates a “GND Island” around the signal pads by adding GND cage around the signal pads (at the empty corridor and in front of QSFP pads) and GND TH (ground through hole) vias from both sides of signal pads (at the empty corridor and in front of QSFP pads).
    Type: Application
    Filed: April 19, 2015
    Publication date: October 20, 2016
    Inventors: Boris SHARAV, Yonatan MAlKIMAN