Abstract: An electronic device including a touch-enabled display module configured to display a plurality of windows according to a multi-window mode; and a control module configured to displaying on the touch screen a first application window and a second application window according to the multi-window mode, alter the first application window in response to a touchscreen input received via the touch-enabled display, and automatically alter the second application window in response to the alteration of the first application window.

Abstract: Provided are a semiconductor device and a method of manufacturing the same. The semiconductor device includes: a memory array on a first substrate; and a peripheral circuit on a second substrate, wherein the first substrate and the second substrate may be attached to each other so that the memory array and the peripheral circuit are electrically connected to each other.

Abstract: A resistive memory device includes a first electrode and a first insulation layer arranged on the first electrode. A portion of the first electrode is exposed through a first hole in the first insulation layer. A first variable resistance layer contacts the exposed portion of the first electrode and extends on the first insulation layer around the first hole. A first switching device electrically connects to the first resistive switching layer.

Abstract: Provided are a non-volatile memory device and a cross-point memory array including the same which have a diode characteristic enabling the non-volatile memory device and the cross-point memory array including the same to operate in a simple structure, without requiring a switching device separately formed so as to embody a high density non-volatile memory device. The non-volatile memory device includes a first electrode; a diode-storage node formed on the first electrode; and a second electrode formed on the diode-storage node.

Abstract: Example embodiments relate to a heterojunction diode, a method of manufacturing the heterojunction diode, and an electronic device including the heterojunction diode. The heterojunction diode may include a first conductive type non-oxide layer and a second conductive type oxide layer bonded to the non-oxide layer. The non-oxide layer may be a Si layer. The Si layer may be a p++ Si layer or an n++ Si layer. A difference in work functions of the non-oxide layer and the oxide layer may be about 0.8-1.2 eV. Accordingly, when a forward voltage is applied to the heterojunction diode, rectification may occur. The heterojunction diode may be applied to an electronic device, e.g., a memory device.

Abstract: The present disclosure relates to a resistance random access memory comprising a first electrode, a thin film layer formed on the first electrode and including a resistance switching layer and a switching layer bonded to each other, and a second electrode formed on the thin film layer, and relates to a method of manufacturing the same.

Abstract: Provided may be a resistive random access memory (RRAM) device and methods of manufacturing and operating the same. The resistive random access memory device may include at least one first electrode, at least one second electrode spaced apart from the at least one first electrode, a first structure including a first resistance-changing layer between the at least one first and second electrodes, and a first switching element electrically connected to the first resistance-changing layer, wherein at least one of the first and second electrodes include an alloy layer having a noble metal and a base metal.

Abstract: Provided are a diode structure and a memory device including the same. The diode structure includes: a first electrode; a p-type Cu oxide layer formed on the first electrode; an n-type InZn oxide layer formed on the p-type Cu oxide layer; and a second electrode formed on the n-type InZn oxide.

Abstract: Example embodiments relate to a heterojunction diode, a method of manufacturing the heterojunction diode, and an electronic device including the heterojunction diode. The heterojunction diode may include a first conductive type non-oxide layer and a second conductive type oxide layer bonded to the non-oxide layer. The non-oxide layer may be a Si layer. The Si layer may be a p++ Si layer or an n++ Si layer. A difference in work functions of the non-oxide layer and the oxide layer may be about 0.8-1.2 eV. Accordingly, when a forward voltage is applied to the heterojunction diode, rectification may occur. The heterojunction diode may be applied to an electronic device, e.g., a memory device.

Abstract: Provided are an oxide diode, a method of fabricating the oxide diode, and an electronic device including the oxide diode. The oxide diode may include an n-type oxide layer treated with plasma, and a p-type oxide layer on the n-type oxide layer. The plasma may include nitrogen.

Abstract: Provided are a semiconductor device and a method of manufacturing the same. The semiconductor device includes: a memory array on a first substrate; and a peripheral circuit on a second substrate, wherein the first substrate and the second substrate may be attached to each other so that the memory array and the peripheral circuit are electrically connected to each other.

Abstract: A resistive memory device includes a first electrode and a first insulation layer arranged on the first electrode. A portion of the first electrode is exposed through a first hole in the first insulation layer. A first variable resistance layer contacts the exposed portion of the first electrode and extends on the first insulation layer around the first hole. A first switching device electrically connects to the first resistive switching layer.

Abstract: Provided are a non-volatile memory device and a cross-point memory array including the same which have a diode characteristic enabling the non-volatile memory device and the cross-point memory array including the same to operate in a simple structure, without requiring a switching device separately formed so as to embody a high density non-volatile memory device. The non-volatile memory device includes a first electrode; a diode-storage node formed on the first electrode; and a second electrode formed on the diode-storage node.

Abstract: Provided are a diode and a memory device comprising the diode. The diode includes a p-type semiconductor layer and an n-type semiconductor layer, wherein at least one of the p-type semiconductor layer and the n-type semiconductor layer comprises a resistance changing material whose resistance is changed according to a voltage applied to the resistance changing material.

Abstract: Provided are a diode structure and a memory device including the same. The diode structure includes: a first electrode; a p-type Cu oxide layer formed on the first electrode; an n-type InZn oxide layer formed on the p-type Cu oxide layer; and a second electrode formed on the n-type InZn oxide.

Abstract: Provided may be a resistive random access memory (RRAM) device and methods of manufacturing and operating the same. The resistive random access memory device may include at least one first electrode, at least one second electrode spaced apart from the at least one first electrode, a first structure including a first resistance-changing layer between the at least one first and second electrodes, and a first switching element electrically connected to the first resistance-changing layer, wherein at least one of the first and second electrodes include an alloy layer having a noble metal and a base metal.

Abstract: A ferroelectric capacitor and a method for manufacturing the same includes a lower electrode, a dielectric layer, and an upper electrode layer, which are sequentially stacked, wherein the dielectric layer has a multi-layer structure including a plurality of sequentially stacked ferroelectric films, and wherein two adjacent ferroelectric films have either different compositions or different composition ratios. Use of a ferroelectric capacitor according to an embodiment of the present invention, it is possible to hold stable polarization states of ferroelectric domains for a long retention time, and thus data written in the ferroelectric capacitor a long time ago can be accurately written, thereby improving the reliability of a ferroelectric random access memory (FRAM).

Abstract: A ferroelectric capacitor and a method for manufacturing the same includes a lower electrode, a dielectric layer, and an upper electrode layer, which are sequentially stacked, wherein the dielectric layer has a multi-layer structure including a plurality of sequentially stacked ferroelectric films, and wherein two adjacent ferroelectric films have either different compositions or different composition ratios. Use of a ferroelectric capacitor according to an embodiment of the present invention, it is possible to hold stable polarization states of ferroelectric domains for a long retention time, and thus data written in the ferroelectric capacitor a long time ago can be accurately written, thereby improving the reliability of a ferroelectric random access memory (FRAM).

Abstract: A ferroelectric capacitor and a method for manufacturing the same includes a lower electrode, a dielectric layer, and an upper electrode layer, which are sequentially stacked, wherein the dielectric layer has a multi-layer structure including a plurality of sequentially stacked ferroelectric films, and wherein two adjacent ferroelectric films have either different compositions or different composition ratios. Use of a ferroelectric capacitor according to an embodiment of the present invention, it is possible to hold stable polarization states of ferroelectric domains for a long retention time, and thus data written in the ferroelectric capacitor a long time ago can be accurately written, thereby improving the reliability of a ferroelectric random access memory (FRAM).

Abstract: A nonvolatile ferroelectric capacitor comprising Bi4−xAxTi3O12 thin film which is obtained by substituting at least some atoms of nonvolatile element A such as La for volatile Bi atoms in Bi4Ti3O2. Nonvolatile element A in perovskite layer of B4−xAxTi3O12 suppress the generation of oxygen vacancies in the perovskite layer, thereby improving fatigue behavior.