Abstract: A piece of luggage including a main body and a power supplying module is disclosed. The main body includes a moving module including a plurality of wheels and a main motor and a power unit electrically connected to the moving module. The wheels include an active wheel electrically connected to the main motor. The power supplying module includes a power supplying unit including a power supplying box and a battery and a connecting unit including a connecting part, a holding part and a conducting wire. The power supplying box has an output port. The battery is disposed in the power supplying box and electrically connected to the output port. The connecting part has a power port corresponding to the output port. The holding part and the conducting wire are connected to the connecting part. The conducting wire is electrically connected to the power port and the power unit.

Abstract: A mask plate, a method for manufacturing a patterned film layer and a manufacturing method of a thin film transistor are provided by the embodiments of the present disclosure. The mask plate includes: a first pattern and a second pattern; the first pattern includes a first sidewall, a second sidewall, a connecting portion connecting the first sidewall and the second sidewall, and an extension portion on a side of the connecting portion away from the first sidewall; the second pattern is between the first sidewall and the second sidewall; a slit is between the first pattern and the second pattern, and the slit is configured for diffraction. The positive photoresist is used, the extension portion of the mask plate makes that the pattern of the photoresist formed by the mask plate with the extension portion has a region corresponding to the extension portion and the “bolt effect” is avoided.

Abstract: A mask plate, a method for manufacturing a patterned film layer and a manufacturing method of a thin film transistor are provided by the embodiments of the present disclosure. The mask plate includes: a first pattern and a second pattern; the first pattern includes a first sidewall, a second sidewall, a connecting portion connecting the first sidewall and the second sidewall, and an extension portion on a side of the connecting portion away from the first sidewall; the second pattern is between the first sidewall and the second sidewall; a slit is between the first pattern and the second pattern, and the slit is configured for diffraction. The positive photoresist is used, the extension portion of the mask plate makes that the pattern of the photoresist formed by the mask plate with the extension portion has a region corresponding to the extension portion and the “bolt effect” is avoided.

Abstract: The present disclosure provides an array substrate, a display panel comprising the array substrate, and a display device, as well as a manufacturing method of the array substrate. The array substrate comprises a base substrate, a metal layer arranged over the base substrate, a conductive material layer arranged on the metal layer, and a connection hole arranged over the conductive material layer to expose the conductive material layer.

Abstract: A manufacturing method of the invention, comprising: successively forming an insulation layer and a photoresist layer on a transparent substrate; performing an exposure and a development on the photoresist layer by a back exposure process, so as to form a trench in the photoresist layer, an open area of the trench proximal to the insulation layer is larger than that of the trench distal to the insulation layer; removing a portion of insulation material in a region of the insulation layer exposed through the trench by an etching process, so as to form a slot in the insulation layer; forming a metal layer on a side of the photoresist layer distal to the insulation layer, a portion of the metal layer is embedded in the slot; removing the photoresist layer and the metal layer thereon by a stripping process, and retaining the portion of the metal layer in the slot.

Abstract: The present application discloses a method of fabricating a display substrate having an organic layer for reducing parasitic capacitance between electrodes in different layers. The method includes forming the organic layer on a base substrate; subjecting the organic layer to a surface treatment process to descum organic residues from a surface of the organic layer; and forming a passivation layer on a side of the organic layer distal to the base substrate subsequent to subjecting the organic layer to the surface treatment process.

Abstract: There is disclosed a method of manufacturing an array substrate, the method including a step of forming thin film transistors on a substrate; wherein the step of forming the thin film transistors on the substrate includes: forming a first electrically conductive layer on the substrate; forming an insulating layer on the first electrically conductive layer; forming at least one common holes in the insulating layer to communicate with the first electrically conductive layer; forming a first connection portion, which is made of the same material as a second electrically conductive layer, in the at least one of the at least one common holes while forming the second electrically conductive layer on the insulating layer by using a single process, the first connection portion being in electrical contact with the first electrically conductive layer. In addition, there is disclosed an array substrate manufactured by the above method and a display device including the array substrate.

Abstract: A thin film transistor and manufacturing method thereof, an array substrate and a display device are disclosed. The thin film transistor includes a source electrode, a drain electrode and an active layer; the source electrode, the drain electrode and the active layer are disposed in a same layer, the source electrode and the drain electrode are separately joined to the active layer through their respective side faces, a material of the source electrode and the drain electrode is metal, and a material of the active layer is a metal oxide semiconductor in correspondence with material of the source electrode and the drain electrode. With the thin film transistor, procedures can be decreased, thereby reducing costs.

Abstract: Embodiments of the present application provide a thin film transistor and a method of manufacturing the same, an array substrate and a display panel. The thin film transistor comprises, successively from the bottom up, a gate, a first common electrode located in the same layer as the gate, a gate insulating layer, an active layer, a pixel electrode, a source-drain electrode layer and a passivation layer located above the layer where the gate is located, and a second common electrode located on the passivation layer, and the thin film transistor further comprises at least one connection electrode located in a same layer as the pixel electrode, wherein at least two via holes are provided between the first common electrode and the second common electrode so as to connect the first common electrode and the second common electrode through the connection electrode.

Abstract: The present application discloses a method of fabricating a display substrate having an organic layer for reducing parasitic capacitance between electrodes in different layers. The method includes forming the organic layer on a base substrate; subjecting the organic layer to a surface treatment process to descum organic residues from a surface of the organic layer; and forming a passivation layer on a side of the organic layer distal to the base substrate subsequent to subjecting the organic layer to the surface treatment process.

Abstract: The present disclosure provides an array substrate, a display panel comprising the array substrate, and a display device, as well as a manufacturing method of the array substrate. The array substrate comprises a base substrate, a metal layer arranged over the base substrate, a conductive material layer arranged on the metal layer, and a connection hole arranged over the conductive material layer to expose the conductive material layer.

Abstract: There is disclosed a method of manufacturing an array substrate, the method including a step of forming thin film transistors on a substrate; wherein the step of forming the thin film transistors on the substrate includes: forming a first electrically conductive layer on the substrate; forming an insulating layer on the first electrically conductive layer; forming at least one common holes in the insulating layer to communicate with the first electrically conductive layer; forming a first connection portion, which is made of the same material as a second electrically conductive layer, in the at least one of the at least one common holes while forming the second electrically conductive layer on the insulating layer by using a single process, the first connection portion being in electrical contact with the first electrically conductive layer. In addition, there is disclosed an array substrate manufactured by the above method and a display device including the array substrate.

Abstract: A manufacturing method of the invention, comprising: successively forming an insulation layer and a photoresist layer on a transparent substrate; performing an exposure and a development on the photoresist layer by a back exposure process, so as to form a trench in the photoresist layer, an open area of the trench proximal to the insulation layer is larger than that of the trench distal to the insulation layer; removing a portion of insulation material in a region of the insulation layer exposed through the trench by an etching process, so as to form a slot in the insulation layer; forming a metal layer on a side of the photoresist layer distal to the insulation layer, a portion of the metal layer is embedded in the slot; removing the photoresist layer and the metal layer thereon by a stripping process, and retaining the portion of the metal layer in the slot.

Abstract: Embodiments of the present disclosure provide a thin film transistor (TFT) and a method of manufacturing the same, which enables to decrease the vertical resistance from the source and the drain to the polarity inversion region, so that the current from the source and the drain to the polarity inversion region may be increased, thereby improving the performances of the TFT. An active layer of the TFT is provided with a first groove and a second groove which neither pass through the active layer. A source and a drain of the TFT are formed at least partially in the first groove and the second groove, respectively. The source and the drain contact the active layer through the first groove and the second groove, respectively.

Abstract: The invention relates to the field of display design, and discloses an array substrate, a manufacturing method thereof, a display panel and a display device. The array substrate comprises a base substrate, and a peripheral gate line, a gate insulation layer, a peripheral data line and a protection layer which are formed on the base substrate in turn, wherein surface height of the protection layer corresponding to position where the peripheral gate line is located is higher than that of the protection layer corresponding to position where the peripheral data line is located. As such, when in contact with a peripheral wiring area of the array substrate, a foreign material is first in contact with the protection layer corresponding to position where the peripheral gate line is located, thereby reducing probability of crushing or scratching the peripheral data line by the foreign material, improving the stability of product performance.

Abstract: Embodiments of the present application provide a thin film transistor and a method of manufacturing the same, an array substrate and a display panel. The thin film transistor comprises, successively from the bottom up, a gate, a first common electrode located in the same layer as the gate, a gate insulating layer, an active layer, a pixel electrode, a source-drain electrode layer and a passivation layer located above the layer where the gate is located, and a second common electrode located on the passivation layer, and the thin film transistor further comprises at least one connection electrode located in a same layer as the pixel electrode, wherein at least two via holes are provided between the first common electrode and the second common electrode so as to connect the first common electrode and the second common electrode through the connection electrode.

Abstract: A thin film transistor and manufacturing method thereof, an array substrate and a display device are disclosed. The thin film transistor includes a source electrode, a drain electrode and an active layer; the source electrode, the drain electrode and the active layer are disposed in a same layer, the source electrode and the drain electrode are separately joined to the active layer through their respective side faces, a material of the source electrode and the drain electrode is metal, and a material of the active layer is a metal oxide semiconductor in correspondence with material of the source electrode and the drain electrode. With the thin film transistor, procedures can be decreased, thereby reducing costs.

Abstract: Embodiments of the present disclosure provide a thin film transistor (TFT) and a method of manufacturing the same, which enables to decrease the vertical resistance from the source and the drain to the polarity inversion region, so that the current from the source and the drain to the polarity inversion region may be increased, thereby improving the performances of the TFT. An active layer of the TFT is provided with a first groove and a second groove which neither pass through the active layer. A source and a drain of the TFT are formed at least partially in the first groove and the second groove, respectively. The source and the drain contact the active layer through the first groove and the second groove, respectively.