Abstract: A digital communication system comprises a transmitter including a (1,0) precoder for precoding a unipolar input digital data stream and a bipolar converter for converting the output signal of the (1,0) precoder into a bipolar signal. The bipolar signal is transmitted through a metallic transmission line to a receiver. The receiver comprises a digitizer for digitizing the transmitted signal to and a line equalization filter for equalizing losses encountered during propagation through the transmission line. A (1,1) converter is provided for converting the output signal of the line equalization filter in a manner opposite to the bipolar converter. A clock recovery circuit derives sample timing pulses from the output of the line equalization filter. A decoder responds to the sample timing pulses to detect symbols from the output signal of the (1,1) converter to generate a replica of the original digital data stream.

Abstract: A finite impulse response digital filter includes a first selector for alternately selecting samples of first and second data streams at intervals T, a second selector for alternately selecting samples of the first and second data streams at intervals T in a manner complementary to the first selector. First and second subfilters are clocked at frequency 1/T and respectively responsive to the outputs of the first and second selectors. The subfilters comprise a common register network for introducing different incremental delay times to the outputs of the first and second selectors and supply the delayed signals to a demultiplexer.

Abstract: In a destuffing circuit for use in processing an input pulse sequence comprising data pulses, stuffing pulses, and control pulses into an output pulse sequence with reference to a data pulse timing signal, the output pulse sequence is produced with the stuffing and the control pulses removed from the input pulse sequence. A local signal producing arrangement produces a local signal by digital processing a predetermined one of first through M-th timing sequences derived from the data pulse timing signal and a preselected one of first through M-th local sequences derived from the local signal, where M represents a predetermined number. The destuffing circuit further comprises a destuffing arrangment responsive to the input sequence and produces the output pulse sequence by using the data pulse timing signal and the local signal.

Abstract: A differential coding system applicable to a staggered quadrature amplitude modulation transmission system is disclosed. Even when ambiguities with respect to phase and time have developed in combination in the transmission system, the differential coding system performs differential coding with ease and, thereby, faithfully regenerates an original data code sequence.

Abstract: A phase-locked loop is supplied with a random two-level code sequence derived from a clock pulse having a frequency f.sub.0 to generate a local clock pulse which is in phase and frequency synchronization with the clock pulse. The local clock pulse is supplied by means of a voltage control oscillator controlled in accordance with a phase difference signal and a phase supplement signal. The phase difference signal is indicative of the difference in phase between an input signal and a discrimination signal. The phase supplement signal is derived by a signal generator responsive to the phase difference signal and the local clock pulses.

Abstract: The apparatus includes circuits for detecting sequential carrier phases of a complex baseband signal and storing the detected carrier phases. A phase predictor is responsive to the detected carrier phases for producing a predicted carrier phase. A circuit is also provided for compensating for a carrier phase deviation of the complex baseband signal in response to the predicted phase. An error detector detects an error associated with data discriminated from the complex baseband signal and a controller controls the phase predictor to minimize the error.

Abstract: A reference data sequence is transmitted and applied to a first automatic equalizer which is arranged in a reference channel. The transmitted reference data is used to establish an initial equalization of the first automatic equalizer. On the other hand, the transmitted reference data sequence is scrambled and is used to establish an initial equalization of another automatic equalizer to which another data sequence obtained by scrambling the reference data sequence is transmitted.

Abstract: The fading protection system protects against fading selectively occuring in a specific channel of a plural data transmission system. An equalizer is provided in each channel and adapted to equalize received data. An error correction mechanism is also provided for correcting errors of the received data in at least any one channel. A comparator associated with each channel is provided to deliver a first signal when the level of the received data in the associated channel has been reduced below a predetermined first threshold to indicate a level reduced channel. A controller operates in response to the first signal so as to deliver, as reference data, the correct data, after correction by the error correcting mechanism, to the equalizer provided in the level reduced channel.

Abstract: A second-order phase-locked loop (PLL) is provided following a demodulating section which is arranged to detect the baseband signals of incoming parallel channel signals. The second-order PLL, which is supplied with a baseband signal of a pilot channel from the demodulating section, includes a first and second control loops. The first control loop is adapted to correct a static phase shift of the pilot channel signal, while the second control loop functions to correct an abrupt frequency offset of same. The second-order PLL is further utilized to correct both static phase shifts and abrupt frequency offsets of data channels (viz., channels other than the pilot channel). A third control loop is further provided which extends between the second-order PLL and the input of the demodulating section, and which has a function by which static or slowly changing frequency offsets of the channels are compensated.

Abstract: In order to establish accurate sample timing in a digital demodulator which forms part of an orthogonally multiplexed parallel data transmission system, two second-order PLLs are arranged after a demodulating section of the digital demodulator so as to receive baseband signals of corresponding pilot channels. The two second-order PLLs each includes an integrator. These integrators apply the outputs thereof to a subtracter which applies the subtraction result to a voltage-controlled oscillator in order to establish the accurate sample timing.

Abstract: A framing system processes a digital signal having a clock period of T seconds and a frame of which is made up of an n-bit framing pattern and m-bit information, (n+m) bits long in total. This system is applicable to a situation in which the probability that a pattern common to the n-bit framing pattern appears in the m-bit information is very low. With attention paid to the special characteristics of a frame pattern, when a coincidence pulse is found at a position different from the present frame position inside a window, the frame information is immediately regarded as being lost at that instant and the system is caused into a hunting state to search a new frame position.

Abstract: A timing signal is generated from a received pulse-amplitude-modulated (PAM) signal by generating a delayed difference signal, multiplying the delayed difference signal by .+-.1 in accordance with a decision signal, averaging the multiplication output to control a voltage-controlled oscillator, and using the oscillator output to clock a sampler/comparator which compares the input signal to a predetermined threshold at time instants determined by the VCO output to generate the decision signal.

Abstract: In an SS (spread spectrum) modem, a high-pass filter (81) for rejecting a low frequency component including an information signal received by demodulation, produces an SS signal component modified by a PN (pseudo noise) code sequence used for the demodulation. A multiplier (82) substantially regenerates the SS signal component. Band division may be resorted to, in which case an input filter (161) selects a partial band SS signal for the demodulation. A transit filter (164) rejects the partial band SS signal. An SS signal is sent to a destination modem through one of output filters (162) selected for the destination modem. Each generator (67, 71) may generate a PN code sequence given by a product of PN codes, one having a frame period equal to an integral multiple (unity allowed) of the PN clock period of another. Each partial band may be about 1/5 of the entire frequency band of the PN code sequence. A center portion of the band may be used in transmitting a narrow-band synchronizing signal.

Abstract: In a transmitter for digitally converting PAM signals, 2L in number, of a common slow sampling rate of 1/T hertzes to an orthogonally multiplexed QAM signal of a fast sampling rate of N/T hertzes, N/2-point input data into which the PAM signals are pre-processed with addition thereto of dummy signals, only (N/2-L) in number, are supplied to at least one N/2-point ODFT (offset discrete Fourier transform) processor (61), a pair of which (61, 62) must have been an N-point ODFT processor accompanied by switches controlled at a T/2-second period. After caused to pass through respective filter units of a bank (71), N/2-point output data are time-division multiplexed into the QAM signal. The filter units may either be complex band-pass or real low-pass filter units. A receiver comprises similar parts and carries out entirely reversed operation.