Patents by Inventor Bo-Wo Choi

Bo-Wo Choi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11664243
    Abstract: A substrate processing apparatus includes: a spin chuck, on which a substrate is mounted, the spin chuck rotating the substrate; At least one of a chemical liquid nozzle configured to provide a chemical liquid to a surface of the substrate and a deionzed water nozzle configured to provide a deionized water to a surface of the substrate; and a laser device configured to emit a pulse waver laser beam having a period of 10?9 seconds or less for etching an edge of the substrate.
    Type: Grant
    Filed: June 13, 2019
    Date of Patent: May 30, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-jine Park, Seung-ho Lee, Bo-wo Choi, Yong-sun Ko, Woo-gwan Shim
  • Patent number: 11217457
    Abstract: A method of fabricating a semiconductor device including preparing a substrate including a wafer inner region and a wafer edge region, the wafer inner region including a chip region and a scribe lane region, sequentially stacking a mold layer and a supporting layer on the substrate, forming a first mask layer on the supporting layer, the first mask layer including a first stepped region on the wafer edge region, forming a step-difference compensation pattern on the first stepped region, forming a second mask pattern including openings, on the first mask layer and the step-difference compensation pattern, and sequentially etching the first mask layer, the supporting layer, and the mold layer using the second mask pattern as an etch mask to form a plurality of holes in at least the mold layer may be provided.
    Type: Grant
    Filed: April 30, 2020
    Date of Patent: January 4, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seungjin Kim, Byung-Hyun Lee, Yoonyoung Choi, Tae-Kyu Kim, Heesook Cheon, Bo-Wo Choi, Hyun-Sil Hong
  • Publication number: 20210050221
    Abstract: A method of fabricating a semiconductor device including preparing a substrate including a wafer inner region and a wafer edge region, the wafer inner region including a chip region and a scribe lane region, sequentially stacking a mold layer and a supporting layer on the substrate, forming a first mask layer on the supporting layer, the first mask layer including a first stepped region on the wafer edge region, forming a step-difference compensation pattern on the first stepped region, forming a second mask pattern including openings, on the first mask layer and the step-difference compensation pattern, and sequentially etching the first mask layer, the supporting layer, and the mold layer using the second mask pattern as an etch mask to form a plurality of holes in at least the mold layer may be provided.
    Type: Application
    Filed: April 30, 2020
    Publication date: February 18, 2021
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Seungjin KIM, Byung-Hyun LEE, Yoonyoung CHOI, Tae-Kyu KIM, Heesook CHEON, Bo-Wo CHOI, Hyun-Sil HONG
  • Publication number: 20200194284
    Abstract: A substrate processing apparatus includes: a spin chuck, on which a substrate is mounted, the spin chuck rotating the substrate; At least one of a chemical liquid nozzle configured to provide a chemical liquid to a surface of the substrate and a deionzed water nozzle configured to provide a deionized water to a surface of the substrate; and a laser device configured to emit a pulse waver laser beam having a period of 10?9 seconds or less for etching an edge of the substrate.
    Type: Application
    Filed: June 13, 2019
    Publication date: June 18, 2020
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Sang-jine Park, Seung-ho Lee, Bo-wo Choi, Yong-sun Ko, Woo-gwan Shim
  • Patent number: 8058128
    Abstract: A method of fabricating a semiconductor device includes forming a mask pattern on an active region of a substrate defined by an isolation region. The mask pattern includes an opening therein exposing a portion of the active region. The exposed portion of the active region is etched to define a preliminary gate trench therein including opposing sidewalls and a surface therebetween, where portions of the mask pattern extend to edges of the active region outside the preliminary gate trench. An annealing process is performed on the substrate to form a gate trench from the preliminary gate trench, and gate electrode is formed in the gate trench. The preliminary gate trench and the gate trench have a substantially similar width defined between the edges of the active region including the portions of the mask pattern thereon.
    Type: Grant
    Filed: April 5, 2010
    Date of Patent: November 15, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Keum-Joo Lee, Bo-Wo Choi, In-Seak Hwang
  • Publication number: 20100255649
    Abstract: A method of fabricating a semiconductor device includes forming a mask pattern on an active region of a substrate defined by an isolation region. The mask pattern includes an opening therein exposing a portion of the active region. The exposed portion of the active region is etched to define a preliminary gate trench therein including opposing sidewalls and a surface therebetween, where portions of the mask pattern extend to edges of the active region outside the preliminary gate trench. An annealing process is performed on the substrate to form a gate trench from the preliminary gate trench, and gate electrode is formed in the gate trench. The preliminary gate trench and the gate trench have a substantially similar width defined between the edges of the active region including the portions of the mask pattern thereon.
    Type: Application
    Filed: April 5, 2010
    Publication date: October 7, 2010
    Inventors: Keum-Joo Lee, Bo-Wo Choi, In-Seak Hwang
  • Publication number: 20100173470
    Abstract: In a method of forming a silicon oxide layer, a spin-on-glass (SOG) layer may be formed on an object including a recess using an SOG composition. The SOG layer may be pre-baked and then cured by contacting with at least one material selected from the group consisting of water, a basic material and an oxidant, under a pressure of from about 1.5 atm to about 100 atm. The cured SOG layer may be baked.
    Type: Application
    Filed: January 8, 2010
    Publication date: July 8, 2010
    Inventors: Mong-Sup Lee, In-Seak Hwang, Keum-Joo Lee, Jin-Hye Bae, Bo-Wo Choi, Seung-Jae Lee