Abstract: The present disclosure relates to a rendering method for generating an image of an assembling toy formed by coupling a plurality of assembling elements arranged in a virtual space. The rendering method includes placing a virtual camera, which is an origin of a ray of light traveling in the virtual space, in the virtual space; emitting a virtual ray from the virtual camera; and determining a pixel value of a pixel corresponding to the virtual ray among pixels of the image in consideration of characteristic information of a transparent assembling element when the virtual ray hits the transparent assembling element among the plurality of assembling element wherein the characteristic information includes at least a transmittance albedo and a reflection albedo.

Abstract: A test socket is provided that includes a socket body to receive an object to be tested, a lid disposed on the socket body, one or more pushers coupled to a first surface of lid to apply force to a first surface of the object toward the socket body, and a temperature controlling member to provide a temperature to the object. A semiconductor package may be tested in a test apparatus that includes the test socket, the methods of testing including receiving a semiconductor package in a socket in a test chamber, applying a first temperature to the test chamber to test the semiconductor package at a first test temperature, and applying a second temperature to the semiconductor package to test the semiconductor package at a second test temperature by controlling the application of the second temperature with the socket.

Abstract: A complementary metal-oxide semiconductor (CMOS)-based planar type avalanche photo diode (APD) using a silicon epitaxial layer and a method of manufacturing the APD, the photo diode including: a substrate; a well layer of a first conductivity type formed in the substrate; an avalanche embedded junction formed in the well layer of the first conductivity type by low energy ion implantation; the silicon epitaxial layer formed in the avalanche embedded junction; a doping area of a second conductivity type opposite to the first conductive type, formed from a portion of a surface of the well layer of the first conductivity type in the avalanche embedded junction and forming a p-n junction; positive and negative electrodes formed on the doping area of the second conductivity type and the well layer of the first conductivity type separated from the doping area of the second conductivity type, respectively; and an oxide layer formed on an overall surface excluding a window where the positive and negative electrodes ar

Abstract: A BJT (bipolar junction transistor)-based uncooled IR sensor and a manufacturing method thereof are provided. The BJT-based uncooled IR sensor includes: a substrate; at least one BJT which is formed to be floated apart from the substrate; and a heat absorption layer which is formed on an upper surface of the at least one BJT, wherein the BJT changes an output value according heat absorbed through the heat absorption layer. Accordingly, it is possible to provide a BJT-based uncooled IR sensor capable of being implemented through a CMOS compatible process and obtaining more excellent temperature change detection characteristics.

Abstract: A photo-detector, in which metal wiring for connecting electrodes is arranged on a planarized surface and thus the metal wiring arrangement is simplified, and a method of manufacturing the same are provided. The photo-detector includes a multi-layer compound semiconductor layer formed on a compound semiconductor substrate. A number of p-n junction diodes are arranged in a regular order in a selected region of the compound semiconductor layer, and an isolation region for individually isolating the p-n junction diodes is formed by implanting impurity ions in the multi-layer compound semiconductor layer. The isolation region and the surface of the compound semiconductor layer are positioned on the same level. The isolation region may be a Fe-impurity region.

Abstract: A BJT (bipolar junction transistor)-based uncooled IR sensor and a manufacturing method thereof are provided. The BJT-based uncooled IR sensor includes: a substrate; at least one BJT which is formed to be floated apart from the substrate; and a heat absorption layer which is formed on an upper surface of the at least one BJT, wherein the BJT changes an output value according heat absorbed through the heat absorption layer. Accordingly, it is possible to provide a BJT-based uncooled IR sensor capable of being implemented through a CMOS compatible process and obtaining more excellent temperature change detection characteristics.

Abstract: Provided are an optoelectronic (OE) transmitter integrated circuit (IC) and method of fabricating the same using a selective growth process. In the OE transmitter IC, a driving circuit, which includes a double heterojunction bipolar transistor (DHBT) and amplifies received electric signals to drive an electroabsorption (EA) modulator, and the EA modulator with a multi-quantum well (MQW) absorption layer are integrated as a single chip on a semi-insulating substrate. The MQW absorption layer of the EA modulator and an MQW insertion layer of the DHBT are formed to different thicknesses from each other using a selective MOCVD growth process.

Abstract: A photo-detector, in which metal wiring for connecting electrodes is arranged on a planarized surface and thus the metal wiring arrangement is simplified, and a method of manufacturing the same are provided. The photo-detector includes a multi-layer compound semiconductor layer formed on a compound semiconductor substrate. A number of p-n junction diodes are arranged in a regular order in a selected region of the compound semiconductor layer, and an isolation region for individually isolating the p-n junction diodes is formed by implanting impurity ions in the multi-layer compound semiconductor layer. The isolation region and the surface of the compound semiconductor layer are positioned on the same level. The isolation region may be a Fe-impurity region.

Abstract: A complementary metal-oxide semiconductor (CMOS)-based planar type avalanche photo diode (APD) using a silicon epitaxial layer and a method of manufacturing the APD, the photo diode including: a substrate; a well layer of a first conductivity type formed in the substrate; an avalanche embedded junction formed in the well layer of the first conductivity type by low energy ion implantation; the silicon epitaxial layer formed in the avalanche embedded junction; a doping area of a second conductivity type opposite to the first conductive type, formed from a portion of a surface of the well layer of the first conductivity type in the avalanche embedded junction and forming a p-n junction; positive and negative electrodes formed on the doping area of the second conductivity type and the well layer of the first conductivity type separated from the doping area of the second conductivity type, respectively; and an oxide layer formed on an overall surface excluding a window where the positive and negative electrodes ar

Abstract: A photo-detector, in which metal wiring for connecting electrodes is arranged on a planarized surface and thus the metal wiring arrangement is simplified, and a method of manufacturing the same are provided. The photo-detector includes a multi-layer compound semiconductor layer formed on a compound semiconductor substrate. A number of p-n junction diodes are arranged in a regular order in a selected region of the compound semiconductor layer, and an isolation region for individually isolating the p-n junction diodes is formed by implanting impurity ions in the multi-layer compound semiconductor layer. The isolation region and the surface of the compound semiconductor layer are positioned on the same level. The isolation region may be a Fe-impurity region.

Abstract: A photo-detector, in which metal wiring for connecting electrodes is arranged on a planarized surface and thus the metal wiring arrangement is simplified, and a method of manufacturing the same are provided. The photo-detector includes a multi-layer compound semiconductor layer formed on a compound semiconductor substrate. A number of p-n junction diodes are arranged in a regular order in a selected region of the compound semiconductor layer, and an isolation region for individually isolated the p-n junction diodes is formed by implanting impurity ions in the multi-layer compound semiconductor layer. The isolation region and the surface of the compound semiconductor layer are positioned on the same level. The isolation region may be a Fe-impurity region.

Abstract: A test socket in accordance with one aspect of the present invention includes a socket body, a thermoelectric element and a heat transfer member. The socket body receives an object. The thermoelectric element is arranged in the socket body to emit heat and absorb heat in accordance with current directions. The heat transfer member is arranged between the object and the thermoelectric element to transfer a heat generated from the object to the thermoelectric element. Thus, the object may be directly provided with a desired test temperature using the thermoelectric element so that the desired test temperature may be set rapidly and accurately. Further, the heat transfer member interposed between the object and the thermoelectric element may quickly dissipate the heat in the object.

Abstract: Provided is a millimeter-wave band frequency optical oscillator that can be used as an oscillation frequency signal source for a millimeter-wave forwarded to wireless subscribers from a base station of a millimeter-wave wireless subscriber communication system for a next generation (e.g., fifth generation) ultra-high speed wireless internet service. A pair of an optical fiber amplifier and an optical fiber grating mirror is connected to each of input/output ports of a loop mirror in parallel, so that a dual mode laser resonator is formed which can make simultaneous oscillation in two laser modes suitable for each wavelength. Accordingly, it is possible to obtain a light source that is modulated to a ultra-high frequency (over 60 GHz) by a beat phenomenon between the two laser modes.

Abstract: Provided are an optoelectronic (OE) transmitter integrated circuit (IC) and method of fabricating the same using a selective growth process. In the OE transmitter IC, a driving circuit, which includes a double heterojunction bipolar transistor (DHBT) and amplifies received electric signals to drive an electroabsorption (EA) modulator, and the EA modulator with a multi-quantum well (MQW) absorption layer are integrated as a single chip on a semi-insulating substrate. The MQW absorption layer of the EA modulator and an MQW insertion layer of the DHBT are formed to different thicknesses from each other using a selective MOCVD growth process.

Abstract: Provided is a photodetector in which a transparent nonconductive material having an interface charge and a trapped charge is deposited on a semiconductor surface so as to form a depletion region on the surface of the semiconductor, and the depletion region is employed as an optical detecting region, thereby not only improving detection with respect to light having a wavelength of ultraviolet and blue ranges but also filtering light having a wavelength of visible and infrared ranges, and in which a fabricating process thereof is compatible with a universal silicon CMOS process.

Abstract: Provided is a method of fabricating a T-type gate including the steps of: forming a first photoresist layer, a blocking layer and a second photoresist layer to a predetermined thickness on a substrate, respectively; forming a body pattern of a T-type gate on the second photoresist layer and the blocking layer; exposing a predetermined portion of the second photoresist layer to form a head pattern of the T-type gate, and performing a heat treatment process to generate cross linking at a predetermined region of the second photoresist layer except for the head pattern of the T-type gate; performing an exposure process on an entire surface of the resultant structure, and then removing the exposed portion; and forming a metal layer of a predetermined thickness on an entire surface of the resultant structure, and then removing the first photoresist layer, the blocking layer, the predetermined region of the second photoresist layer in which the cross linking are generated, and the metal layer, whereby it is possible

Abstract: Provided are an optoelectronic (OE) transmitter integrated circuit (IC) and method of fabricating the same using a selective growth process. In the OE transmitter IC, a driving circuit, which includes a double heterojunction bipolar transistor (DHBT) and amplifies received electric signals to drive an electroabsorption (EA) modulator, and the EA modulator with a multi-quantum well (MQW) absorption layer are integrated as a single chip on a semi-insulating substrate. The MQW absorption layer of the EA modulator and an MQW insertion layer of the DHBT are formed to different thicknesses from each other using a selective MOCVD growth process.

Abstract: Provided is a method of fabricating a T-type gate including the steps of: forming a first photoresist layer, a blocking layer and a second photoresist layer to a predetermined thickness on a substrate, respectively; forming a body pattern of a T-type gate on the second photoresist layer and the blocking layer; exposing a predetermined portion of the second photoresist layer to form a head pattern of the T-type gate, and performing a heat treatment process to generate cross linking at a predetermined region of the second photoresist layer except for the head pattern of the T-type gate; performing an exposure process on an entire surface of the resultant structure, and then removing the exposed portion; and forming a metal layer of a predetermined thickness on an entire surface of the resultant structure, and then removing the first photoresist layer, the blocking layer, the predetermined region of the second photoresist layer in which the cross linking are generated, and the metal layer, whereby it is possible

Abstract: A nonvolatile ferroelectric memory that reduces the number of cycles of reference cells to extend lifetime of memory. A reference cell of the memory is activated to provide a reference voltage to a sense amplifier only when the sense amplifier needs the reference voltage. The memory comprises a plurality of cells arranged in a matrix form and including memory cells and reference cells, and a plurality of sense amplifiers arranged in a row of the matrix, in which each sense amplifier compares voltages induced from a reference cell and a selected memory cell to read information stored in the selected memory cell, and in which each reference cell is activated only when both a selection signal from a column address and a word line connected to said reference cell are enabled.

Abstract: The present invention relates to a on silicon substrate, specifically to an inductor device and manufacturing method thereof for enhancing the quality factor of the inductor by disposing trenches on a silicon substratre, and by filling the inside of the trenches with polycrystalline polysilicon not doped with impurities. The present invention provides an inductor device and a manufacturing method thereof which can improve the quality factor by increasing resistance of the substrate by forming deep trenches disposed in specific patterns on a low-resistance silicon substrate and filling polycrystalline silicon not doped with impurities, and by reducing parasitic capacitance between the inductor and the silicon substrate.