Patents by Inventor Boyd Finlay

Boyd Finlay has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190109029
    Abstract: At least one method, apparatus and system disclosed herein involves performing a wafer to wafer feedback control of process performed on a semiconductor substrate. A first process on a first semiconductor wafer of a run of semiconductor wafers is performed using a processing tool. A first gas analysis of a gas in the processing tool is performed upon performing the first process. Determining a process feedback adjustment based upon a result of the first gas analysis. Data relating to the process feedback adjustment is provided. Performing a second process on a second semiconductor wafer based on the data relating to the process feedback adjustment.
    Type: Application
    Filed: October 5, 2017
    Publication date: April 11, 2019
    Inventors: Eyup Cinar, Robert Boyd Finlay, Patrick Leonard Minton
  • Patent number: 10186439
    Abstract: Semiconductor device fabrication systems and methods are provided. In an example, a semiconductor device fabrication system includes a semiconductor fabrication tool. Further, the semiconductor device fabrication system includes wireless sensors associated with the semiconductor fabrication tool. The wireless sensors measure process parameters of the fabrication tool and transmit wireless signals. The semiconductor device fabrication system also includes a sensor controller configured to identify the wireless sensors associated with the semiconductor fabrication tool and to receive the wireless signals from the wireless sensors. The semiconductor device fabrication system further includes a tool controller including a receiver for receiving data from the sensor controller. The tool controller is configured to sequentially assign system variable identifiers (SVID) to the data from the sensor controller, and to contextualize the data in data packets.
    Type: Grant
    Filed: July 25, 2016
    Date of Patent: January 22, 2019
    Assignee: GLOBALFOUNDRIES, INC.
    Inventors: Boyd Finlay, Mark Reath, Eric Warren
  • Patent number: 10109046
    Abstract: Systems for and methods of detecting faults in semiconductor wafers are provided. One method includes, for instance: monitoring, with at least one sensor, a recipe for manufacturing a semiconductor wafer; tracking, with a fault detection system, a set of steps for the recipe; determining a start of a step; sensing a set of data related to at least one parameter of the step; generating, by an imaging system, an image of the set of data; displaying, on a display, the image of the set of data; calculating, by the fault detection system, a pixel area ratio from the image of the set of data; determining if a fault exists in the wafer based upon the pixel area ratio; and displaying, on the display, an indication of the fault during real-time and at an end of the step.
    Type: Grant
    Filed: July 19, 2016
    Date of Patent: October 23, 2018
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Robert Boyd Finlay, Yunsheng Song
  • Publication number: 20180025929
    Abstract: Semiconductor device fabrication systems and methods are provided. In an example, a semiconductor device fabrication system includes a semiconductor fabrication tool. Further, the semiconductor device fabrication system includes wireless sensors associated with the semiconductor fabrication tool. The wireless sensors measure process parameters of the fabrication tool and transmit wireless signals. The semiconductor device fabrication system also includes a sensor controller configured to identify the wireless sensors associated with the semiconductor fabrication tool and to receive the wireless signals from the wireless sensors. The semiconductor device fabrication system further includes a tool controller including a receiver for receiving data from the sensor controller. The tool controller is configured to sequentially assign system variable identifiers (SVID) to the data from the sensor controller, and to contextualize the data in data packets.
    Type: Application
    Filed: July 25, 2016
    Publication date: January 25, 2018
    Inventors: Boyd Finlay, Mark Reath, Eric Warren
  • Publication number: 20180025483
    Abstract: Systems for and methods of detecting faults in semiconductor wafers are provided. One method includes, for instance: monitoring, with at least one sensor, a recipe for manufacturing a semiconductor wafer; tracking, with a fault detection system, a set of steps for the recipe; determining a start of a step; sensing a set of data related to at least one parameter of the step; generating, by an imaging system, an image of the set of data; displaying, on a display, the image of the set of data; calculating, by the fault detection system, a pixel area ratio from the image of the set of data; determining if a fault exists in the wafer based upon the pixel area ratio; and displaying, on the display, an indication of the fault during real-time and at an end of the step.
    Type: Application
    Filed: July 19, 2016
    Publication date: January 25, 2018
    Applicant: GLOBALFOUNDRIES Inc.
    Inventors: Robert Boyd FINLAY, Yunsheng SONG
  • Publication number: 20170268941
    Abstract: We disclose a tactile sensing instrumented wafer, which may comprise a substrate; and at least one tactile sensor array disposed on a top surface of the substrate. The at least one tactile sensor array may comprise carbon nanotubes or a piezoelectric transducer. In further embodiments, the instrumented wafer may further comprise a power supply; a memory; a communications interface; and a controller. An instrumented wafer in accordance with embodiments herein may detect both downforce and lateral forces impinging on the wafer, and may be used in a semiconductor device manufacturing system.
    Type: Application
    Filed: March 21, 2016
    Publication date: September 21, 2017
    Applicant: GLOBALFOUNDRIES INC.
    Inventor: Robert Boyd Finlay
  • Patent number: 7247209
    Abstract: An apparatus and method for the improved combined edge bead removal and backside wash of spin coated semiconductor wafers is disclosed. This is preferably accomplished by providing a nozzle having a plurality of outlets adapted for the ejection of a cleaning fluid onto the backside of a semiconductor wafer. This cleaning fluid can be EEP or a similar EBR type of solvent. This dual outlet nozzle can be mounted to a stationary EBR arm, and preferably comprises two outlets located on a beveled top surface that are separated at a predetermined angle. The angle of this beveled top surface with respect to a horizontal plane of the processed wafer is preferably about 45 degrees, while the angle of each nozzle outlet with respect to a primary axis of the stationary EBR arm is also preferably about 45 degrees. Other angles are also possible in order to maximize solvent jet efficiency.
    Type: Grant
    Filed: June 12, 2003
    Date of Patent: July 24, 2007
    Assignee: National Semiconductor Corporation
    Inventors: Gary Robertson, Robert Boyd Finlay
  • Publication number: 20040250839
    Abstract: An apparatus and method for the improved combined edge bead removal and backside wash of spin coated semiconductor wafers is disclosed. This is preferably accomplished by providing a nozzle having a plurality of outlets adapted for the ejection of a cleaning fluid onto the backside of a semiconductor wafer. This cleaning fluid can be EEP or a similar EBR type of solvent. This dual outlet nozzle can be mounted to a stationary EBR arm, and preferably comprises two outlets located on a beveled top surface that are separated at a predetermined angle. The angle of this beveled top surface with respect to a horizontal plane of the processed wafer is preferably about 45 degrees, while the angle of each nozzle outlet with respect to a primary axis of the stationary EBR arm is also preferably about 45 degrees. Other angles are also possible in order to maximize solvent jet efficiency.
    Type: Application
    Filed: June 12, 2003
    Publication date: December 16, 2004
    Applicant: National Semiconductor Corporation
    Inventors: Gary Robertson, Robert Boyd Finlay