Abstract: A package includes at least one electronic component mounted on an imprinted substrate. In an embodiment, the substrate may comprise conductive traces, vias, and patterns of lands on one or more layers. Such features may be formed by imprinting in one operation rather than sequentially. Conductor features, such as trenches, holes, and planes, may be formed of different sizes simultaneously. One or more vias may be formed in one or more trenches. Methods of fabricating an imprinted substrate, as well as application of the imprinted package to an electronic assembly, are also described.

Abstract: A substrate with at least one conductive post formed prior to the formation of an inter-layer dielectric (ILD) coating on the substrate. The conductive post may be formed from a metal layer of the substrate. Additionally, the conductive post may be built up on the substrate.

Abstract: Adhesive material is applied to a surface of a metallic core layer. The adhesive material is removed from a conductive region of the metallic core layer. A metallic contact is provided over the conductive region of the metallic core layer. The metallic core layer is laminated to an imprinted buildup layer, the buildup layer having a dielectric region and a conductive region, wherein a nonconductive region of the metallic core layer is bonded to the dielectric region of the buildup layer and the conductive region of the metallic core layer is bonded to the conductive region of the imprinted-buildup layer.

Abstract: A method and apparatus for making an imprinted conductive circuit using semi-additive plating. A plurality of indented channels is formed on the substrate. The surface is coated with a conductive layer. Portions of the surface other than the indented channels are coated with a non-conductive layer, and metal is plated on the conductive layer in the channels. The non-conductive layer and the first conductive layer are removed from portions of the surface other than the indented channels. In some embodiments, a first set of channels has a first depth and a second set of channels has a second depth. The plating adds a first amount of metal in the first set of channels and the second set of channels. The first set of channels is coated with a non-conductive layer, and a second amount of additional conductive material is plated in the second set of channels.

Abstract: Adhesive material is applied to a surface of a metallic core layer. The adhesive material is removed from a conductive region of the metallic core layer. A metallic contact is provided over the conductive region of the metallic core layer. The metallic core layer is laminated to an imprinted buildup layer, the buildup layer having a dielectric region and a conductive region, wherein a nonconductive region of the metallic core layer is bonded to the dielectric region of the buildup layer and the conductive region of the metallic core layer is bonded to the conductive region of the imprinted-buildup layer.

Abstract: A method and system for electrically interconnecting a semiconductor device and a component is presented. The semiconductor device includes a dielectric portion on at least one face thereof. Similarly, the component includes a dielectric portion on at least one face thereof The device and component are constructed and arranged to be stacked and bonded together. A first laser selectively ablates the respective dielectric portions of the device and component. The ablating creates a starting pad on the device or component and a destination pad on the device or component. A second laser deposits a conductor along a path between the starting pad and destination pad. As such, smaller, more condensed electronic packages may be fabricated.

Abstract: A method and system for electrically interconnecting a semiconductor device and a component is presented. The semiconductor device includes a dielectric portion on at least one face thereof. Similarly, the component includes a dielectric portion on at least one face thereof. The device and component are constructed and arranged to be stacked and bonded together. A first laser selectively ablates the respective dielectric portions of the device and component. The ablating creates a starting pad on the device or component and a destination pad on the device or component. A second laser deposits a conductor along a path between the starting pad and destination pad. As such, smaller, more condensed electronic packages may be fabricated.

Abstract: A method comprising coating a core surface with an A-stage thermoset resin to produce an A-stage thermoset resin layer; partially curing the A-stage resin layer to produce a partially cured thermoset resin layer; and imprinting a plurality of conductor features into the partially cured thermoset resin layer to produce an imprinted substrate is provided. An electronic package comprising a substrate having a plurality of conductor features formed by imprinting, the substrate formed from an A-stage resin that has partially cured; and an electronic component coupled to the substrate is also provided. Coating with an A-stage thermoset resin as part of the imprinting process reduces thickness variation in the layers, provides full, intimate contact with prior layers and eliminates damage to prior layers.

Abstract: A method and apparatus for making an imprinted conductive circuit using semi-additive plating. A plurality of indented channels is formed on the substrate. The surface is coated with a conductive layer. Portions of the surface other than the indented channels are coated with a non-conductive layer, and metal is plated on the conductive layer in the channels. The non-conductive layer and the first conductive layer are removed from portions of the surface other than the indented channels. In some embodiments, a first set of channels has a first depth and a second set of channels has a second depth. The plating adds a first amount of metal in the first set of channels and the second set of channels. The first set of channels is coated with a non-conductive layer, and a second amount of additional conductive material is plated in the second set of channels.

Abstract: To decrease the complexity, time, and cost of fabricating an electronics package, and to potentially increase the quality and decrease the size thereof, the package includes at least one electronic component mounted on an imprinted substrate. In an embodiment, the substrate may comprise conductive traces, vias, and patterns of lands on one or more layers. Such features may be formed by imprinting in one operation rather than sequentially. Conductor features, such as trenches, holes, and planes, may be formed of different sizes simultaneously. Methods of fabrication, as well as application of the imprinted package to an electronic assembly, are also described.

Abstract: A substrate with at least one conductive post formed prior to the formation of an inter-layer dielectric (ILD) coating on the substrate. The conductive post may be formed from a metal layer of the substrate. Additionally, the conductive post may be built up on the substrate.

Abstract: Adhesive material is applied to a surface of a metallic core layer. The adhesive material is removed from a conductive region of the metallic core layer. A metallic contact is provided over the conductive region of the metallic core layer. The metallic core layer is laminated to an imprinted buildup layer, the buildup layer having a dielectric region and a conductive region, wherein a nonconductive region of the metallic core layer is bonded to the dielectric region of the buildup layer and the conductive region of the metallic core layer is bonded to the conductive region of the imprinted-buildup layer.

Abstract: A method and system for electrically interconnecting a semiconductor device and a component is presented. The semiconductor device includes a dielectric portion on at least one face thereof. Similarly, the component includes a dielectric portion on at least one face thereof. The device and component are constructed and arranged to be stacked and bonded together. A first laser selectively ablates the respective dielectric portions of the device and component. The ablating creates a starting pad on the device or component and a destination pad on the device or component. A second laser deposits a conductor along a path between the starting pad and destination pad. As such, smaller, more condensed electronic packages may be fabricated.