Patents by Inventor Bpin Lo

Bpin Lo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Deep trench capacitor with scallop profile
    Patent number: 10692966
    Abstract: The present disclosure relates to a method of forming a deep trench capacitor. In some embodiments, the method may be performed by selectively etching a substrate to form a trench having serrated sidewalls defining a plurality of curved depressions. A dielectric material is formed within the trench. The dielectric material conformally lines the serrated sidewalls. A conductive material is deposited within the trench and is separated from the substrate by the dielectric material. The dielectric material is configured to act as a capacitor dielectric between a first electrode comprising the conductive material and a second electrode arranged within the substrate.
    Type: Grant
    Filed: September 10, 2018
    Date of Patent: June 23, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tsui-Ling Yen, Chyi-Tsong Ni, Ruei-Hung Jang, Bpin Lo
  • DEEP TRENCH CAPACITOR WITH SCALLOP PROFILE
    Publication number: 20190019860
    Abstract: The present disclosure relates to a method of forming a deep trench capacitor. In some embodiments, the method may be performed by selectively etching a substrate to form a trench having serrated sidewalls defining a plurality of curved depressions. A dielectric material is formed within the trench. The dielectric material conformally lines the serrated sidewalls. A conductive material is deposited within the trench and is separated from the substrate by the dielectric material. The dielectric material is configured to act as a capacitor dielectric between a first electrode comprising the conductive material and a second electrode arranged within the substrate.
    Type: Application
    Filed: September 10, 2018
    Publication date: January 17, 2019
    Inventors: Tsui-Ling Yen, Chyi-Tsong Ni, Ruei-Hung Jang, Bpin Lo
  • DEEP TRENCH CAPACITOR WITH SCALLOP PROFILE
    Publication number: 20170186837
    Abstract: The present disclosure relates to an integrated chip having a deep trench capacitor with serrated sidewalls defining curved depressions, and a method of formation. In some embodiments, the integrated chip includes a substrate having a trench with serrated sidewalls defining a plurality of curved depressions. A layer of dielectric material conformally lines the serrated sidewalls, and a layer of conductive material is arranged within the trench and is separated from the substrate by the layer of dielectric material. The layer of dielectric material is configured as a capacitor dielectric between a first electrode comprising the layer of conductive material and a second electrode arranged within the substrate.
    Type: Application
    Filed: November 21, 2016
    Publication date: June 29, 2017
    Inventors: Tsui-Ling Yen, Chyi-Tsong Ni, Ruei-Hung Jang, Bpin Lo