Abstract: A trigger signal for a memory tester uses a (breakpoint) trigger qualified according to what part of the test program is being executed. The qualified breakpoint trigger can be delayed before becoming a system trigger signal that can be used to trigger a ‘scope mode and to force an error flag to a selected value so as to compel a particular path with the test program. To provide stable waveforms for the sweeping of the voltage thresholds and sample timing offset the memory tester records the addresses for a target sequence of transmit vectors issued during an initial pass through the test program subsequent to the occurrence of the trigger. These addresses are exchanged for the instructions themselves, which are then altered to remove branching, and stored in a reserved portion of the memory they came from. Once the altered target sequence is stored the desired information is produced by restarting the entire test program and letting it run exactly as before down to the trigger.

Abstract: A trigger signal for a memory tester having algorithmic test programs detects the occurrence of a trigger specification expressed in terms of existing hardware quantities used to operate the DUT. This forms a raw hardware (breakpoint) trigger that can be further qualified according to what part of the test program is being executed. The qualified breakpoint trigger can be delayed by zero or more DUT cycles before becoming a system trigger signal that can be used to trigger a ‘scope mode and to force an error flag to a selected value so as to compel a particular path with the test program. A user interacts with a process not part of the test program to define a trigger specification from masks and comparison mechanisms that recognize the raw trigger condition at the level of the hardware register values. That process also informs the compiler as to which portions of the test program are to enable the raw trigger specification (done by setting a bit in the instruction word).

Abstract: A display mode processor which maps pixel inputs into addresses for entries in window-specific color look-up tables in accordance with a predetermined display mode. The display mode processor relieves the central processing unit from video display tasks in a multi-window environment and also supports window-specific attributes such as display mode in addition to window specific color look up tables. This dedicated hardware for video display tasks allows for a more flexible and efficient color display system without sacrificing the overall system performance.

Abstract: A color map image fader which lets a user draw one or more planar images and then fade them in or out for visual effect. An image frame buffer is subdivided to store multiple images provided by the user, and the resulting multiple images are combined as a single image within a display window on a pixel by pixel basis by the invention. The invention sums the pixel color data on a per-pixel basis, and the pixel data is scaled as a separate operation using color map entries. This permits image fading, which is used in conjunction with the image blending to provide real-time fading of one image into another or is used alone to simply fade one image on a per-pixel basis. The fading may be done by scaling all of the entries from a color map by some value, and this can be done without redrawing the image. The invention also allows for separate processing of data within each window by defining each pixel with respect to its window boundaries.

Abstract: A digital image blending/comparison circuit which lets a user draw several planar images and then sum them together with a scalable "blend" function or subtract them and display the difference image. An image frame buffer is subdivided to store multiple images provided by the user, and the resulting multiple images are combined as a single image within a display window on a pixel by pixel basis during a blending mode or subtracted within a display window on a pixel by pixel basis in a comparison mode. During the blending mode, the invention sums the pixel color data on a per-pixel basis, where the pixel data is scaled as a separate operation on color map entries. However, during the comparison mode, the invention subtracts the pixel color data on a per-pixel basis and scales the difference image signal so that it is perceptible on the display.