Abstract: Mobile devices may utilize various sensors to gather context information pertaining to the user's surroundings. These devices may also include and/or access other types of information pertaining to the user, such as the user's calendar data. In one embodiment, mobile devices may utilize some or all the gathered information to determine the appropriate behavior of the mobile device, in conjunction with the user's preferences.

Abstract: A method, machine readable medium, and system is disclosed. In one embodiment the method comprises establishing a connection between a wireless electronic device and one or more supervisory devices associated with a local area of wireless coverage, negotiating an associated environment protocol between the wireless device and the one or more local area supervisory devices, and determining which functions are available for use on the wireless device in the local area based on the outcome of the negotiation.

Abstract: A method, machine readable medium, and system is disclosed. In one embodiment the method comprises establishing a connection between a wireless electronic device and one or more supervisory devices associated with a local area of wireless coverage, negotiating an associated environment protocol between the wireless device and the one or more local area supervisory devices, and determining which functions are available for use on the wireless device in the local area based on the outcome of the negotiation.

Abstract: Mobile devices may utilize various sensors to gather context information pertaining to the user's surroundings. These devices may also include and/or access other types of information pertaining to the user, such as the user's calendar data. In one embodiment, mobile devices may utilize some or all the gathered information to determine the appropriate behavior of the mobile device, in conjunction with the user's preferences.

Abstract: A system and method for creating a virtual reality is defined. The virtual reality is efficiently constructed by providing a framework, or paradigm, in which the various aspects of the virtual world may be separately constructed, and then brought together at runtime to create the desired virtual reality. The framework includes views, which are windows into a virtual world, virtual worlds which are complete 3D models of the virtual reality, and modular components which are beings (or entities or creatures) that populate the virtual world. The components have both a graphical (visual) model and a behavioral model. The graphical model and behavioral model are independent software modules that may be reused with other components. Included with the modules are attributes, rules, and other parameters that may be used to affect the basic visual appearance and behavior of a component. Components may inherit from other components. The graphical model of a component is constructed from a hierarchy of parts.

Abstract: A digital architecture for a pulse generator includes a triggerable voltage controlled oscillator (VCO) with two alternative sources of frequency control voltage, an internal DAC or a phase frequency comparison with an external timebase. In a top octave of operation, the output of the triggerable VCO is used to produce output pulses whose edge locations are then adjusted by small digital increments or "slivers" and very small analog increments or "verniers". In lower octaves of operation, the contents of a pattern RAM serve to frequency divide the triggerable VCO output frequency by powers of two. The RAM contents are converted to a serial bit stream that imposes the coarse pulse width and period as an integral number of top octave periods, or quanta. The edge locations are then adjusted with slivers and verniers, as in the top octave. Automatic calibration facilities are included.

Abstract: A digital architecture for a pulse generator includes a triggerable voltage controlled oscillator (VCO) with two alternative sources of frequency control voltage, an internal DAC or a phase frequency comparison with an external timebase. In a top octave of operation, the output of the triggerable VCO is used to produce output pulses whose edge locations are then adjusted by small digital increments or "slivers" and very small analog increments or "verniers". In lower octaves of operation, the contents of a pattern RAM serve to frequency divide the triggerable VCO output frequency by powers of two. The RAM contents are converted to a serial bit stream that imposes the coarse pulse width and period as an integral number of top octave periods, or quanta. The edge locations are then adjusted with slivers and verniers, as in the top octave. Automatic calibration facilities are included.

Abstract: A digital architecture for a pulse generator includes a triggerable voltage controlled oscillator (VCO) with two alternative sources of frequency control voltage, an internal DAC or a phase frequency comparison with an external timebase. In a top octave of operation, the output of the triggerable VCO is used to produce output pulses whose edge locations are then adjusted by small digital increments or "slivers" and very small analog increments or "verniers". In lower octaves of operation, the contents of a pattern RAM serve to frequency divide the triggerable VCO output frequency by powers of two. The RAM contents are converted to a serial bit stream that imposes the coarse pulse width and period as an integral number of top octave periods, or quanta. The edge locations are then adjusted with slivers and verniers, as in the top octave. Automatic calibration facilities are included.

Abstract: A digital architecture for a pulse generator provides a method of synchronizing signals of the pulse generator. The pulse generator has a timebase card, a microprocessor and a plurality of pulse cards. The microprocessor controls the parameters of the timebase card and pulse cards, and the timebase card provides a common master clock signal to all of the pulse cards determined by a triggerable voltage controlled oscillator that has two sources of frequency control voltage, an internal DAC for absolute frequency and a frequency comparison circuit for synchronization with an external timebase. The pulse cards produce pulses, either singly or in bursts, with the leading and trailing edges being separately positionable using quantum, sliver and vernier controls. A pattern RAM on each pulse card provides a pulse pattern that provides an approximation of the desired pulses to one quantum, and repeated iterations through the pattern RAM provide bursts of pulses.

Abstract: A digital architecture for a pulse generator includes a triggerable voltage controlled oscillator (VCO) with two alternative sources of frequency control voltage, an internal DAC or a phase frequency comparison with an external timebase. In a top octave of operation, the output of the triggerable VCO is used to produce output pulses whose edge locations are then adjusted by small digital increments or "slivers" and very small analog increments or "verniers". In lower octaves of operation, the contents of a pattern RAM serve to frequency divide the triggerable VCO output frequency by powers of two. The RAM contents are converted to a serial bit stream that imposes the coarse pulse width and period as an integral number of top octave periods, or quanta. The edge locations are then adjusted with slivers and verniers, as in the top octave. Automatic calibration facilities are included.