Abstract: Systems and methods are disclosed to provide programmable input/output functionality for a programmable logic device. For example, in accordance with one embodiment of the present invention, a programmable interface selectively employs a scalable serializer-deserializer and clock and data recovery circuit. The programmable interface further includes programmable input/output buffers and embedded memory to allow the programmable logic device to support a wide range of input/output interface standards.

Abstract: A zero-power non-volatile memory cell includes a control element, an avalanche injection element, and a CMOS inverter. A floating-gate electrode is capacitively coupled to the control element, the avalanche injection element, and to the CMOS inverter. The avalanche injection element is arranged, so as to transfer electrical charge onto the floating-gate electrode. The presence of stored data within the memory cell is indicated by reading a supply voltage V.sub.DD at an output terminal of the inverter. Accordingly, data can be read from the non-volatile memory cell without applying electrical power to the cell.

Abstract: A sense amplifier is provided for sensing an impedance between two lines. The impedance has two levels. The two lines are, in one embodiment, a product term line and a product term ground line of a programmable logic device. In the amplifier, a pull-up circuit connects one of the two lines to a high voltage (for example, V.sub.DD =5 volts), and a pull-down circuit connects the other line to a low voltage (for example, ground). A negative feedback circuit controls the pull-up and pull-down circuits in response to the voltage on one of the two lines so that the impedance of the pull-up circuit changes in direct relationship with respect to the voltage of that line, and the impedance of the pull-down circuit changes in an inverse relationship with respect to that voltage. The feedback circuit has a delay at least as long as the transition of that voltage between its two values, which values correspond to the two impedance levels. The delay permits to increase the transition speed in a power-efficient manner.