Patents by Inventor Brad T. Moore

Brad T. Moore has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6104064
    Abstract: Various processes are provided for producing a p-channel and/or n-channel transistor. The present processes are thereby applicable to NMOS, PMOS or CMOS integrated circuits, any of which derive a benefit from having an asymmetrical LDD structure. The asymmetrical structure can be produced on a p-channel or n-channel transistor in various ways. According, the present process employs various techniques to form an asymmetrical transistor. The various techniques employ processing steps which vary depending upon the LDD result desired. First, the LDD implant can be performed only in the drain-side of the channel, or in the drain-side as well as the source-side. Second, the gate conductor sidewall surface adjacent the drain can be made thicker than the sidewall surface adjacent the source.
    Type: Grant
    Filed: May 6, 1999
    Date of Patent: August 15, 2000
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Daniel Kadosh, Mark I. Gardner, Michael Duane, Jon D. Cheek, Fred N. Hause, Robert Dawson, Brad T. Moore
  • Patent number: 5930592
    Abstract: Various processes are provided for producing a p-channel and/or n-channel transistor. The present processes are thereby applicable to NMOS, PMOS or CMOS integrated circuits, any of which derive a benefit from having an asymmetrical LDD structure. The asymmetrical structure can be produced on a p-channel or n-channel transistor in various ways. According, the present process employs various techniques to form an asymmetrical transistor. The various techniques employ processing steps which vary depending upon the LDD result desired. First the LDD implant can be performed only in the drain-side of the channel, or in the drain-side as well as the source-side. Second, the gate conductor sidewall surface adjacent the drain can be made thicker than the sidewall surface adjacent the source.
    Type: Grant
    Filed: October 1, 1996
    Date of Patent: July 27, 1999
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Daniel Kadosh, Brad T. Moore, Jon D. Cheek
  • Patent number: 5744371
    Abstract: Various processes are provided for producing a p-channel and/or n-channel transistor. The present processes are thereby applicable to NMOS, PMOS or CMOS integrated circuits, any of which derive a benefit from having an asymmetrical LDD structure. The asymmetrical structure can be produced on a p-channel or n-channel transistor in various ways. According, the present process employs various techniques to form an asymmetrical transistor. The various techniques employ processing steps which vary depending upon the LDD result desired. First, the LDD implant can be performed only in the drain-side of the channel, or in the drain-side as well as the source-side. Second, the gate conductor sidewall surface adjacent the drain can be made thicker than the sidewall surface adjacent the source.
    Type: Grant
    Filed: October 1, 1996
    Date of Patent: April 28, 1998
    Inventors: Daniel Kadosh, Brad T. Moore