Patents by Inventor Brad W. Simeral

Brad W. Simeral has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11334164
    Abstract: An electronic device includes an enclosure having a transparent cover defining a touch-sensitive surface, a display positioned within the enclosure and below the transparent cover, and a haptic device configured to produce a haptic output along the touch-sensitive surface. The haptic device may include a battery element electrically coupled to the display, a magnetic element, and a coil assembly fixed with respect to the enclosure and configured to induce an oscillatory movement of the battery element parallel to the display to produce the haptic output. In other examples, the coil assembly may be coupled to the battery element and the first and second magnetic elements may be fixed with respect to the enclosure.
    Type: Grant
    Filed: May 29, 2020
    Date of Patent: May 17, 2022
    Assignee: Apple Inc.
    Inventors: Jody C. Fu, Erik G. de Jong, Christopher R. Pasma, Katharine R. Chemelewski, Rex T. Ehman, Brad W. Simeral
  • Publication number: 20220083122
    Abstract: An electronic device may include a display panel. When content of an image frame is expected to consume relatively higher amounts of power, a controller of the electronic device may operate a switch to change a power supply of the display panel to be a power management integrated circuit of the electronic device. However, when content of an image frame is expected to consume relatively less amounts of power, the controller may operate the switch to change the power supply of the display panel to be a power supply of an electronic display, such as a power supply used to power driver circuitry of the electronic display.
    Type: Application
    Filed: December 3, 2020
    Publication date: March 17, 2022
    Inventors: Ramana V. Rachakonda, Peter F. Holland, Rohit K. Gupta, Brad W. Simeral
  • Publication number: 20220075440
    Abstract: In an embodiment, a system may include one or more processors forming central processing units (CPUs) in the system, a display controller configured to display frames on a display device, a memory controller configured to control a memory, and a power management circuit. The power management circuit may be configured to establish one of a plurality of power states in the system. In a first power state, the display controller and the memory controller are powered on while the CPUs are powered off. The display controller may be configured to read a plurality of prerendered frames from the memory and display the plurality of prerendered frames at times specified for each of the plurality of prerendered frames.
    Type: Application
    Filed: September 9, 2020
    Publication date: March 10, 2022
    Inventors: Ramana V. Rachakonda, Rohit K. Gupta, Brad W. Simeral, Peter F. Holland
  • Publication number: 20210191499
    Abstract: An electronic device may include a display panel to display images based on corresponding image data and an image source to pre-render a flip-book including a first image frame for display at a first target presentation time and a second image frame for display at a second target presentation time. The electronic device may also include a display pipeline coupled between the display panel and the image source having image data processing circuitry to process image data for display. The electronic device may also include a controller to instruct the display pipeline to process image data, to determine a power-on time based on a target presentation time, and to instruct the display pipeline to power-gate the image data processing circuitry upon completion of the processing of image data and until the power-on time is reached.
    Type: Application
    Filed: March 8, 2021
    Publication date: June 24, 2021
    Inventors: Peter F. Holland, Brad W. Simeral, Lior Zimet
  • Patent number: 10942559
    Abstract: An electronic device may include a display panel to display images based on corresponding image data and an image source to pre-render a flip-book including a first image frame for display at a first target presentation time and a second image frame for display at a second target presentation time. The electronic device may also include a display pipeline coupled between the display panel and the image source having image data processing circuitry to process image data for display. The electronic device may also include a controller to instruct the display pipeline to process image data, to determine a power-on time based on a target presentation time, and to instruct the display pipeline to power-gate the image data processing circuitry upon completion of the processing of image data and until the power-on time is reached.
    Type: Grant
    Filed: September 6, 2018
    Date of Patent: March 9, 2021
    Assignee: Apple Inc.
    Inventors: Peter F. Holland, Brad W. Simeral, Lior Zimet
  • Patent number: 10925164
    Abstract: Methods and systems for producing circuitry using stackable passive components are discussed. More specifically, the present disclosure provides designs and fabrication methods for production of stackable devices that may be used as components in circuitry such as filters and impedance matching adaptors. Such components may be used to save space in printed circuit boards. Moreover, stackable passive components may be dual components, which may be improve the electrical performance in certain types of circuits such as matched component filters.
    Type: Grant
    Filed: September 12, 2017
    Date of Patent: February 16, 2021
    Assignee: Apple Inc.
    Inventors: Paul A. Martinez, Curtis C. Mead, Scott D. Morrison, Giancarlo F. De La Cruz, Lin Chen, Albert Wang, Brad W. Simeral
  • Publication number: 20210026450
    Abstract: An electronic device includes an enclosure having a transparent cover defining a touch-sensitive surface, a display positioned within the enclosure and below the transparent cover, and a haptic device configured to produce a haptic output along the touch-sensitive surface. The haptic device may include a battery element electrically coupled to the display, a magnetic element, and a coil assembly fixed with respect to the enclosure and configured to induce an oscillatory movement of the battery element parallel to the display to produce the haptic output. In other examples, the coil assembly may be coupled to the battery element and the first and second magnetic elements may be fixed with respect to the enclosure.
    Type: Application
    Filed: May 29, 2020
    Publication date: January 28, 2021
    Inventors: Jody C. Fu, Erik G. de Jong, Christopher R. Pasma, Katharine R. Chemelewski, Rex T. Ehman, Brad w. Simeral
  • Publication number: 20200380926
    Abstract: A device implementing a system for displaying an image includes a processor configured to, generate, during a first power state of a device, a data structure specifying image frames and a respective display time for each of the image frames, and retrieve, during a second power state of the device and from the data structure, an image frame based on the respective display time for the image frame. The at least one processor is further configured to display, during a third power state of the device, the retrieved image frame on a display of the device.
    Type: Application
    Filed: May 29, 2020
    Publication date: December 3, 2020
    Inventors: Simon M. DOUGLAS, Ross THOMPSON, Russell A. BLAINE, Arthur L. SPENCE, Brad W. SIMERAL, Giovanni M. AGNOLI, Chendi ZHANG, Jacob Z. WEISS, Yiqiang NIE, Brent W. SCHORSCH
  • Patent number: 10825419
    Abstract: In situations with reduced image changes, display panels, such as the ones disclosed herein, may reduce their power consumption by performing self-refresh cycles, in which they may display locally stored data in the display panel instead of retrieving it from an image buffer. Methods and circuitry for management of the self-refresh cycle may reduce jitter, luminance errors, and/or flickers that may be caused by untimely self-refresh cycles that may occur as a result of latency in the image buffer. In some implementations, the display panel may have a dedicated low latency input that notifies an arrival of an incoming image. In some implementations, the self-refresh cycles of the panel may be managed by a host or a buffer that is responsible for sending the images.
    Type: Grant
    Filed: September 27, 2017
    Date of Patent: November 3, 2020
    Assignee: Apple Inc.
    Inventors: Yue Jack Chu, Christopher P. Tann, Arthur L. Spence, Brad W. Simeral, Yafei Bi, Jiayi Jin, Ruo-Gu Huang, Haifeng Li, Weijun Yao, Chaohao Wang
  • Publication number: 20200081517
    Abstract: An electronic device may include a display panel to display images based on corresponding image data and an image source to pre-render a flip-book including a first image frame for display at a first target presentation time and a second image frame for display at a second target presentation time. The electronic device may also include a display pipeline coupled between the display panel and the image source having image data processing circuitry to process image data for display. The electronic device may also include a controller to instruct the display pipeline to process image data, to determine a power-on time based on a target presentation time, and to instruct the display pipeline to power-gate the image data processing circuitry upon completion of the processing of image data and until the power-on time is reached.
    Type: Application
    Filed: September 6, 2018
    Publication date: March 12, 2020
    Inventors: Peter F. Holland, Brad W. Simeral, Lior Zimet
  • Patent number: 10424438
    Abstract: Systems and methods described in this disclosure are related to fabrication and utilization of two-terminal electrical components that may have terminations with reduced width. Components, such as the ones described herein may be used to increase the density of components in electrical devices, as they may reduce a separation distance between devices that lead to solder bridging. Methods for fabrication are also described, including the use of ceramic layers that may provide reduction in parasitic capacitance and/or inductances.
    Type: Grant
    Filed: September 24, 2016
    Date of Patent: September 24, 2019
    Assignee: APPLE INC.
    Inventors: Paul A. Martinez, Curtis C. Mead, Scott D. Morrison, Giancarlo F. De La Cruz, Lin Chen, Albert Wang, Brad W Simeral, Vu Vo, Wyeman Chen
  • Patent number: 10224873
    Abstract: In various embodiments, a voltage collection bootstrap circuit includes a capacitor, an inductor, an oscillator, a bias circuit, and a switch. A current may be induced in the inductor, the oscillator, or both. The inductor, the oscillator, or both may store energy in the capacitor. The inductor, capacitor, and oscillator may supply energy to the bias circuit. The bias circuit may output a difference between a reference voltage and a voltage corresponding to the energy received from at least one of the inductor, capacitor, and oscillator. Based on the output of the bias circuit, a switch may connect the voltage collection circuit to an output of at least one of the inductor, capacitor, and oscillator. Accordingly, energy may be provided to the voltage collection circuit using one or more induced currents.
    Type: Grant
    Filed: December 13, 2016
    Date of Patent: March 5, 2019
    Assignee: Apple Inc.
    Inventors: Joseph T. DiBene, II, Rashed Mahameed, Brad W. Simeral
  • Publication number: 20190027114
    Abstract: In situations with reduced image changes, display panels, such as the ones disclosed herein, may reduce their power consumption by performing self-refresh cycles, in which they may display locally stored data in the display panel instead of retrieving it from an image buffer. Methods and circuitry for management of the self-refresh cycle may reduce jitter, luminance errors, and/or flickers that may be caused by untimely self-refresh cycles that may occur as a result of latency in the image buffer. In some implementations, the display panel may have a dedicated low latency input that notifies an arrival of an incoming image. In some implementations, the self-refresh cycles of the panel may be managed by a host or a buffer that is responsible for sending the images.
    Type: Application
    Filed: September 27, 2017
    Publication date: January 24, 2019
    Inventors: Yue Jack Chu, Christopher P. Tann, Arthur L. Spence, Brad W. Simeral, Yafei Bi, Jiayi Jin, Ruo-Gu Huang, Haifeng Li, Weijun Yao, Chaohao Wang
  • Patent number: 10002586
    Abstract: Display data used in display frame generation are compressed for efficient storage in a local memory within a graphics processing unit. The compression technique used is difference encoding and before performing difference encoding, display data in RGB format are converted into YCbCr format. Since the component values of adjacent pixels in YCbCr format typically vary less than the component values of the same adjacent pixels in RGB format, converting the display data to YCbCr format before performing difference encoding improves the compression efficiency.
    Type: Grant
    Filed: December 13, 2006
    Date of Patent: June 19, 2018
    Assignee: NVIDIA CORPORATION
    Inventors: Sreenivas Krishnan, Koen Bennebroek, Karthik Bhat, Stefano A. Pescador, David G. Reed, Brad W. Simeral, Edward M. Veeser
  • Publication number: 20180092212
    Abstract: Methods and systems for producing circuitry using stackable passive components are discussed. More specifically, the present disclosure provides designs and fabrication methods for production of stackable devices that may be used as components in circuitry such as filters and impedance matching adaptors. Such components may be used to save space in printed circuit boards. Moreover, stackable passive components may be dual components, which may be improve the electrical performance in certain types of circuits such as matched component filters.
    Type: Application
    Filed: September 12, 2017
    Publication date: March 29, 2018
    Inventors: Paul A. Martinez, Curtis C. Mead, Scott D. Morrison, Giancarlo F. De La Cruz, Lin Chen, Albert Wang, Brad W. Simeral
  • Publication number: 20170208690
    Abstract: Systems and methods described in this disclosure are related to fabrication and utilization of two-terminal electrical components that may have terminations with reduced width. Components, such as the ones described herein may be used to increase the density of components in electrical devices, as they may reduce a separation distance between devices that lead to solder bridging. Methods for fabrication are also described, including the use of ceramic layers that may provide reduction in parasitic capacitance and/or inductances.
    Type: Application
    Filed: September 24, 2016
    Publication date: July 20, 2017
    Inventors: Paul A. Martinez, Curtis C. Mead, Scott D. Morrison, Giancarlo F. De La Cruz, Lin Chen, Albert Wang, Brad W. Simeral, Vu Vo, Wyeman Chen
  • Patent number: 9032101
    Abstract: A method for providing access to hardware devices by a processor without causing conflicts with other processors included in a computer system. The method includes receiving a first address map from a first processor and a second address map from a second processor, where each address map includes memory-mapped input/output (I/O) apertures for a set of hardware devices that the processor is configured to access. The method further includes generating a global address map by combining the first address map and the second address map, receiving a first access request from the first processor and routing the first access request to a hardware device based on an address mapping included in the global address map. Advantageously, heterogeneous processors included in multi-processor system can access any hardware device included in the computer system, without modifying the processors, one or more operating systems executed by each processor, or the hardware devices.
    Type: Grant
    Filed: December 10, 2008
    Date of Patent: May 12, 2015
    Assignee: NVIDIA Corporation
    Inventors: Michael Brian Cox, Brad W. Simeral
  • Patent number: 9015446
    Abstract: A method for providing a first processor access to a memory associated with a second processor. The method includes receiving a first address map from the first processor that includes an MMIO aperture for a NUMA device, receiving a second address map from a second processor that includes MMIO apertures for hardware devices that the second processor is configured to access, and generating a global address map by combining the first and second address maps. The method further includes receiving an access request transmitted from the first processor to the NUMA device, generating a memory access request based on the first access request and a translation table that maps a first address associated with the first access request into a second address associated with the memory associated with the second processor, and routing the memory access request to the memory based on the global address map.
    Type: Grant
    Filed: December 10, 2008
    Date of Patent: April 21, 2015
    Assignee: NVIDIA Corporation
    Inventors: Michael Brian Cox, Brad W. Simeral
  • Patent number: 8943584
    Abstract: A method for providing an operating system access to devices, including enumerating hardware devices and virtualized devices, where resources associated with a first hardware device are divided into guest physical resources creating a software virtualized device, and multiple instances of resources associated with a second hardware device are advertised thereby creating a hardware virtualized device. First and second permission lists are generated that specify which operating systems are permitted to access the software virtualized device and the hardware virtualized device, respectively. First and second sets of virtual address maps are generated, where each set maps an address space associated with either the software virtualized device or the hardware virtualized device into an address space associated with each operating system included in the corresponding permission list.
    Type: Grant
    Filed: August 6, 2012
    Date of Patent: January 27, 2015
    Assignee: NVIDIA Corporation
    Inventors: Brad W. Simeral, Michael Brian Cox
  • Publication number: 20140136793
    Abstract: A system and method are described for dynamically changing the size of a computer memory such as level 2 cache as used in a graphics processing unit. In an embodiment, a relatively large cache memory can be implemented in a computing system so as to meet the needs of memory intensive applications. But where cache utilization is reduced, the capacity of the cache can be reduced. In this way, power consumption is reduced by powering down a portion of the cache.
    Type: Application
    Filed: November 13, 2012
    Publication date: May 15, 2014
    Applicant: NVIDIA CORPORATION
    Inventors: James Patrick Robertson, Oren Rubinstein, Michael A. Woodmansee, Don Bittel, Stephen D. Lew, Edward Riegelsberger, Brad W. Simeral, Gregory Alan Muthler, John Matthew Burgess