Patents by Inventor Bradford Lawrence Hunter
Bradford Lawrence Hunter has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 10135428Abstract: In a described example, an apparatus includes: a capacitor coupled to receive a current at a first terminal and having a second terminal coupled to ground; a first comparator coupled to a voltage at the first terminal of the capacitor and to a first reference voltage; a second comparator coupled to the voltage at the first terminal of the capacitor and to a second reference voltage that is different from the first reference voltage, and having an enable input coupled to the output of the first comparator; a discharge circuit coupled to the capacitor and enabled by the output of the second comparator; and a toggle circuit coupled to the output of the second comparator. Methods are disclosed.Type: GrantFiled: August 31, 2016Date of Patent: November 20, 2018Assignee: Texas Instruments IncorporatedInventor: Bradford Lawrence Hunter
-
Publication number: 20180254652Abstract: A battery pack includes a housing, a battery, a battery pack output voltage path that includes a charge power switch and a discharge power switch, and a battery sense output. A switch can be operably coupled between the battery and the battery sense output and configured to selectively open and close a battery sense path between the battery and the battery sense output. By one approach a first control circuit controls the open and close state of the aforementioned switch (in response, for example, to a comparison of the voltage differential across the switch to a predetermined threshold such that the switch is opened when the voltage differential across the switch becomes too positive or too negative with respect to battery voltage).Type: ApplicationFiled: December 13, 2017Publication date: September 6, 2018Inventors: Bradford Lawrence Hunter, Wan Laan Jackie Hui
-
Publication number: 20180062626Abstract: In a described example, an apparatus includes: a capacitor coupled to receive a current at a first terminal and having a second terminal coupled to ground; a first comparator coupled to a voltage at the first terminal of the capacitor and to a first reference voltage; a second comparator coupled to the voltage at the first terminal of the capacitor and to a second reference voltage that is different from the first reference voltage, and having an enable input coupled to the output of the first comparator; a discharge circuit coupled to the capacitor and enabled by the output of the second comparator; and a toggle circuit coupled to the output of the second comparator. Methods are disclosed.Type: ApplicationFiled: August 31, 2016Publication date: March 1, 2018Inventor: Bradford Lawrence Hunter
-
Patent number: 9407250Abstract: The disclosure presented herein provides example embodiments of systems for accurate multiplexing. The systems and methods presented may be suitable for non-limiting examples of analog to digital conversion with a switched input voltage (for a switched capacitor application) or any circuit with high voltage/high accuracy voltage multiplexing. In an example embodiment, pulsed current sources may be implemented to rapidly turn on and turn off the selected and unselected multiplexer ports while maintaining relatively low power consumption. A Kelvin input port may allow a high voltage input to be accurately sensed by avoiding a voltage drop associated with a selected pass gate p-channel FET channel resistance and parasitic wire resistance. The Kelvin input port biases the gate of a pass FET structure whose body terminals are allowed to remain floating.Type: GrantFiled: February 5, 2010Date of Patent: August 2, 2016Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Bradford Lawrence Hunter, Richard David Nicholson, Wallace Edward Matthews
-
Publication number: 20140376134Abstract: In an integrated circuit device having an internal circuitry that requires voltage protection (e.g. negative voltage protection), the voltage protection is provided by a FET. In some embodiments, the source and drain of the FET are connected in series with the internal circuitry and an I/O node through which the voltage can be received (e.g. the source connected to the internal circuitry and the drain connected to the I/O node). In some embodiments, the FET is drain-extended (e.g. a drain-extended PFET).Type: ApplicationFiled: June 19, 2013Publication date: December 25, 2014Inventors: Bradford Lawrence Hunter, Richard David Nicholson
-
Patent number: 8134401Abstract: The disclosed systems and methods of low offset switched capacitor comparator reduce settling errors. The system operates in two major phases. During a first phase, the input voltage is sampled on the input capacitors and a differential amplifier is configured in a unity gain configuration to sample the amplifier offset. During the second phase, the input voltage difference is amplified at the output of the comparator. The amplifier transient sampling error is reduced by shorting the outputs of the differential amplifier for a shorting period at the start of the second phase. A clocked comparator at the output of the differential amplifier provides a fast comparison using internal positive feedback. The differential amplifier should have developed sufficient differential output voltage to overcome the offset of the clocked comparator.Type: GrantFiled: March 22, 2010Date of Patent: March 13, 2012Assignee: Texas Instruments IncorportedInventors: Bradford Lawrence Hunter, Wallace Edward Matthews
-
Patent number: 8093941Abstract: Systems and devices for dynamically scaled charge pumping are presented. Example embodiments of the disclosed systems of dynamically scaled charge pumping enable regulation of the output voltage at a particular ratio and to dynamically control the ratio based on the input voltage. A charge pumping circuit is enabled by an oscillator. The charge pump oscillator is enabled by the output of a comparator. The comparator compares an input voltage to a comparator voltage, which is a divided version of the output voltage. The output voltage is referenced to a regulated voltage and the comparison voltage is divided between the two voltages by a resistor divider. The regulated voltage remains flat until the input voltage equals the reference voltage. At that point, the regulated voltage will begin to rise and follow the input voltage. Before the reference voltage is reached, the output voltage equals the input voltage multiplied by the resistor divider ratio.Type: GrantFiled: February 18, 2010Date of Patent: January 10, 2012Assignee: Texas Instruments IncorporatedInventors: Bradford Lawrence Hunter, Richard David Nicholson, Tsing Hsu
-
Publication number: 20110089977Abstract: The disclosed systems and methods of low offset switched capacitor comparator reduce settling errors. The system operates in two major phases. During a first phase, the input voltage is sampled on the input capacitors and a differential amplifier is configured in a unity gain configuration to sample the amplifier offset. During the second phase, the input voltage difference is amplified at the output of the comparator. The amplifier transient sampling error is reduced by shorting the outputs of the differential amplifier for a shorting period at the start of the second phase. A clocked comparator at the output of the differential amplifier provides a fast comparison using internal positive feedback. The differential amplifier should have developed sufficient differential output voltage to overcome the offset of the clocked comparator.Type: ApplicationFiled: March 22, 2010Publication date: April 21, 2011Applicant: TEXAS INSTRUMENTS INCORPORATEDInventors: Bradford Lawrence Hunter, Wallace Edward Matthews
-
Publication number: 20110089992Abstract: The disclosure presented herein provides example embodiments of systems for accurate multiplexing. The systems and methods presented may be suitable for non-limiting examples of analog to digital conversion with a switched input voltage (for a switched capacitor application) or any circuit with high voltage/high accuracy voltage multiplexing. In an example embodiment, pulsed current sources may be implemented to rapidly turn on and turn off the selected and unselected multiplexer ports while maintaining relatively low power consumption. A Kelvin input port may allow a high voltage input to be accurately sensed by avoiding a voltage drop associated with a selected pass gate p-channel FET channel resistance and parasitic wire resistance. The Kelvin input port biases the gate of a pass FET structure whose body terminals are allowed to remain floating.Type: ApplicationFiled: February 5, 2010Publication date: April 21, 2011Applicant: TEXAS INSTRUMENTS INCORPORATEDInventors: Bradford Lawrence Hunter, Richard David Nicholson, Wallace Edward Matthews
-
Publication number: 20110089996Abstract: Systems and devices for dynamically scaled charge pumping are presented. Example embodiments of the disclosed systems of dynamically scaled charge pumping enable regulation of the output voltage at a particular ratio and to dynamically control the ratio based on the input voltage. A charge pumping circuit is enabled by an oscillator. The charge pump oscillator is enabled by the output of a comparator. The comparator compares an input voltage to a comparator voltage, which is a divided version of the output voltage. The output voltage is referenced to a regulated voltage and the comparison voltage is divided between the two voltages by a resistor divider. The regulated voltage remains flat until the input voltage equals the reference voltage. At that point, the regulated voltage will begin to rise and follow the input voltage. Before the reference voltage is reached, the output voltage equals the input voltage multiplied by the resistor divider ratio.Type: ApplicationFiled: February 18, 2010Publication date: April 21, 2011Applicant: TEXAS INSTRUMENTS INCORPORATEDInventors: Bradford Lawrence Hunter, Richard David Nicho, Tsing Hsu
-
Patent number: 7466198Abstract: A differential gain boosted amplifier is provided. The differential amplifier includes at least one current mirror, at least one differential pair, at least one cascode, at least one differential gain boosting amplifier for differential current mirror voltage control, and at least one common mode amplifier comprising a common mode voltage to control the output common mode of the differential gain boosting amplifier. The common mode voltage includes a mirrored bias voltage. The mirrored bias voltage feeds directly into the common mode amplifier. A differential input voltage feeds directly into the differential gain boosting amplifier and the differential pair. A gain of the current mirror is boosted by the differential gain boosting amplifier. A differential output voltage is indicative of the differential input voltage with an increase in gain. The differential output voltage is connected to the cascode.Type: GrantFiled: April 18, 2008Date of Patent: December 16, 2008Assignee: International Business Machines CorporationInventor: Bradford Lawrence Hunter