Patents by Inventor Bradley D. Herrman

Bradley D. Herrman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10045434
    Abstract: A printed circuit board (‘PCB’) comprising: an interior socket configured to receive a connector pin of a first electronic component, the connector pin characterized by a pin impedance; a signal trace coupled to the interior socket, the signal trace configured to transmit electrical signals between the first electronic component and other electronic components mounted on the PCB, the signal trace characterized by a trace impedance; and an insulator between the interior socket and a sleeve that surrounds the interior socket, the sleeve physically configured such that an effective pin impedance matches the trace impedance within a predetermined threshold, wherein the effective pin impedance represents the resistance experienced by electrical signals passing through the connector pin when the connector pin is inserted into the interior socket.
    Type: Grant
    Filed: December 15, 2014
    Date of Patent: August 7, 2018
    Assignee: Lenovo Enterprise Solutions (Singapore) Pte. Ltd.
    Inventors: Candice L. Coletrane, Bradley D. Herrman
  • Patent number: 9390048
    Abstract: A control circuit is provided on a printed circuit board to detect the presence of a memory module installed in at least one of a plurality of memory module connectors, wherein installation of the memory module is known to cause impedance to decrease in a segment of a daisy chain memory circuit. The impedance of a first signal conductor of the daisy chain memory circuit is automatically altered to reduce a mismatch in impedance between the first signal conductor and the segment in response to detecting the presence of the memory module in the connector. A metal element is incorporated into the printed circuit board a spaced distance from the first signal conductor, and the control circuit may selectively activate one or more relays to cause the metal element to function as either a floating trace or a ground reference.
    Type: Grant
    Filed: December 4, 2013
    Date of Patent: July 12, 2016
    Assignee: Lenovo Enterprise Solutions (Singapore) Pte. Ltd.
    Inventors: Candice L. Coletrane, Sasa Cvijetic, Bradley D. Herrman, Shanay S. Kinds, Pravin S. Patel
  • Publication number: 20160174359
    Abstract: A printed circuit board (‘PCB’) comprising: an interior socket configured to receive a connector pin of a first electronic component, the connector pin characterized by a pin impedance; a signal trace coupled to the interior socket, the signal trace configured to transmit electrical signals between the first electronic component and other electronic components mounted on the PCB, the signal trace characterized by a trace impedance; and an insulator between the interior socket and a sleeve that surrounds the interior socket, the sleeve physically configured such that an effective pin impedance matches the trace impedance within a predetermined threshold, wherein the effective pin impedance represents the resistance experienced by electrical signals passing through the connector pin when the connector pin is inserted into the interior socket.
    Type: Application
    Filed: December 15, 2014
    Publication date: June 16, 2016
    Inventors: CANDICE L. COLETRANE, BRADLEY D. HERRMAN
  • Patent number: 9338881
    Abstract: In a particular embodiment, a method of manufacturing a printed circuit board (‘PCB’) with reduced dielectric loss includes fabricating conductive traces disposed upon layers of dielectric material; and fabricating the layers of dielectric material, including core layers and prepreg layers, with one or more of the layers of dielectric material including pockets of air that reduce an overall relative dielectric constant of the PCB. In the particular embodiment, the conductive traces are disposed upon layers of the dielectric material orthogonally with respect to one another and the pockets of air are aligned at an angle of 45 degrees with respect to the conductive traces.
    Type: Grant
    Filed: June 25, 2012
    Date of Patent: May 10, 2016
    Assignee: Lenovo Enterprise Solutions (Singapore) Pte. Ltd.
    Inventors: Moises Cases, Bradley D. Herrman, Bhyrav M. Mutnury, Nam H. Pham, Terence Rodrigues
  • Patent number: 9244120
    Abstract: A method for altering an impedance of a conductive pathway on a microelectronic package includes applying a magnetic field to the conductive pathway. The microelectronic package may be, for example, a printed circuit board. The method also includes controlling a magnitude of the magnetic field at the conductive pathway for altering the impedance of the conductive pathway. The magnetic field may be applied by, for example, an electromagnet or a permanent magnet. A magnetic field may also be applied for simulating crosstalk effects on a conductive pathway.
    Type: Grant
    Filed: June 15, 2012
    Date of Patent: January 26, 2016
    Assignee: LENOVO ENTERPRISE SOLUTIONS (SINGAPORE) PTE. LTD.
    Inventors: Bradley D. Herrman, Bhyrav M. Mutnury, Terence Rodrigues
  • Publication number: 20150154140
    Abstract: A control circuit is provided on a printed circuit board to detect the presence of a memory module installed in at least one of a plurality of memory module connectors, wherein installation of the memory module is known to cause impedance to decrease in a segment of a daisy chain memory circuit. The impedance of a first signal conductor of the daisy chain memory circuit is automatically altered to reduce a mismatch in impedance between the first signal conductor and the segment in response to detecting the presence of the memory module in the connector. A metal element is incorporated into the printed circuit board a spaced distance from the first signal conductor, and the control circuit may selectively activate one or more relays to cause the metal element to function as either a floating trace or a ground reference.
    Type: Application
    Filed: December 4, 2013
    Publication date: June 4, 2015
    Applicant: International Business Machines Corporation
    Inventors: Candice L. Coletrane, Sasa Cvijetic, Bradley D. Herrman, Shanay S. Kinds, Pravin S. Patel
  • Patent number: 8390393
    Abstract: Embodiments of the present invention address deficiencies of the art in respect to via structure utilization in a PCB design and provide a novel and non-obvious method, system and computer program product for impedance discontinuity remediation for via stubs and connectors in a PCB. In one embodiment a method for impedance discontinuity remediation in a PCB can be provided. The method can include configuring a pre-distortion filter to negate an impedance discontinuity in an electrical signal caused by a transmission line with one of a via stub or a connector. The method further can include pre-distortion filtering an electrical signal before transmitting the electrical signal over the transmission line. Finally, the method can include transmitting the pre-distortion filtered electrical signal over the transmission line.
    Type: Grant
    Filed: September 4, 2012
    Date of Patent: March 5, 2013
    Assignee: International Business Machines Corporation
    Inventors: Justin P. Bandholz, Moises Cases, Robert J. Christopher, Daniel de Araujo, Bradley D. Herrman, Erdem Matoglu, Bhyrav M. Mutnury, Pravin S. Patel, Nam H. Pham
  • Publication number: 20130025119
    Abstract: A printed circuit board (‘PCB’) with reduced dielectric loss, including conductive traces disposed upon layers of dielectric material, the layers of dielectric material including core layers and prepreg layers, one or more of the layers of dielectric material including pockets of air that reduce an overall relative dielectric constant of the PCB.
    Type: Application
    Filed: June 25, 2012
    Publication date: January 31, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: MOISES CASES, BRADLEY D. HERRMAN, BHYRAV M. MUTNURY, NAM H. PHAM, TERENCE RODRIGUES
  • Publication number: 20120327622
    Abstract: Embodiments of the present invention address deficiencies of the art in respect to via structure utilization in a PCB design and provide a novel and non-obvious method, system and computer program product for impedance discontinuity remediation for via stubs and connectors in a PCB. In one embodiment a method for impedance discontinuity remediation in a PCB can be provided. The method can include configuring a pre-distortion filter to negate an impedance discontinuity in an electrical signal caused by a transmission line with one of a via stub or a connector. The method further can include pre-distortion filtering an electrical signal before transmitting the electrical signal over the transmission line. Finally, the method can include transmitting the pre-distortion filtered electrical signal over the transmission line.
    Type: Application
    Filed: September 4, 2012
    Publication date: December 27, 2012
    Applicant: International Business Machines Corporation
    Inventors: Justin P. Bandholz, Moises Cases, Robert J. Christopher, Daniel N. de Araujo, Bradley D. Herrman, Erdem Matoglu, Bhyrav M. Mutnury, Pravin S. Patel, Nam H. Pham
  • Patent number: 8319113
    Abstract: A printed circuit board (‘PCB’) with reduced dielectric loss, including conductive traces disposed upon layers of dielectric material, the layers of dielectric material including core layers and prepreg layers, one or more of the layers of dielectric material including pockets of air that reduce an overall relative dielectric constant of the PCB.
    Type: Grant
    Filed: June 9, 2010
    Date of Patent: November 27, 2012
    Assignee: International Buisness Machines Corporation
    Inventors: Moises Cases, Bradley D. Herrman, Bhyrav M. Mutnury, Nam H. Pham, Terence Rodrigues
  • Patent number: 8289043
    Abstract: A method for altering an impedance of a conductive pathway on a microelectronic package includes applying a magnetic field to the conductive pathway. The microelectronic package may be, for example, a printed circuit board. The method also includes controlling a magnitude of the magnetic field at the conductive pathway for altering the impedance of the conductive pathway. The magnetic field may be applied by, for example, an electromagnet or a permanent magnet. A magnetic field may also be applied for simulating crosstalk effects on a conductive pathway.
    Type: Grant
    Filed: March 26, 2010
    Date of Patent: October 16, 2012
    Assignee: International Business Machines Corporation
    Inventors: Bradley D. Herrman, Bhyrav M. Mutnury, Terence Rodrigues
  • Patent number: 8289101
    Abstract: Embodiments of the present invention address deficiencies of the art in respect to via structure utilization in a PCB design and provide a novel and non-obvious method, system and computer program product for impedance discontinuity remediation for via stubs and connectors in a PCB. In one embodiment a method for impedance discontinuity remediation in a PCB can be provided. The method can include configuring a pre-distortion filter to negate an impedance discontinuity in an electrical signal caused by a transmission line with one of a via stub or a connector. The method further can include pre-distortion filtering an electrical signal before transmitting the electrical signal over the transmission line. Finally, the method can include transmitting the pre-distortion filtered electrical signal over the transmission line.
    Type: Grant
    Filed: April 19, 2007
    Date of Patent: October 16, 2012
    Assignee: International Business Machines Corporation
    Inventors: Justin P. Bandholz, Moises Cases, Robert J. Christopher, Daniel N. de Araujo, Bradley D. Herrman, Erdem Matoglu, Bhyrav M. Mutnury, Pravin S. Patel, Nam H. Pham
  • Publication number: 20120249162
    Abstract: A method for altering an impedance of a conductive pathway on a microelectronic package includes applying a magnetic field to the conductive pathway. The microelectronic package may be, for example, a printed circuit board. The method also includes controlling a magnitude of the magnetic field at the conductive pathway for altering the impedance of the conductive pathway. The magnetic field may be applied by, for example, an electromagnet or a permanent magnet. A magnetic field may also be applied for simulating crosstalk effects on a conductive pathway.
    Type: Application
    Filed: June 15, 2012
    Publication date: October 4, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Bradley D. Herrman, Bhyrav M. Mutnury, Terence Rodrigues
  • Patent number: 8106666
    Abstract: Testing an electrical component, the component including a printed circuit board (‘PCB’) with a number of traces, the traces organized in pairs with each trace of a pair carrying current in opposite directions and separated from one another by a substrate layer of the PCB, where testing of the electrical component includes: dynamically and iteratively until a present impedance for a pair of traces of the component is greater than a predetermined threshold impedance: increasing, by an impedance varying device at the behest of a testing device, magnetic field strength of a magnetic field applied to the pair of traces by the impedance varying device, including increasing the present impedance of the pair of traces; measuring, by the testing device, one or more operating parameters; and recording, by the testing device, the measurements of the operating parameters.
    Type: Grant
    Filed: March 12, 2009
    Date of Patent: January 31, 2012
    Assignee: International Business Macines Corporation
    Inventors: Rubina F. Ahmed, Moises Cases, Bradley D. Herrman, Bhyrav M. Mutnury, Pravin Patel, Peter R. Seidel
  • Patent number: 8084692
    Abstract: An apparatus having reduced noise coupling includes a core layer having an upper and lower surface, the upper and lower surface each including a copper sheet layer, a pre-preg layer having an upper surface and a lower surface, the upper surface of the pre-preg layer coupled to the lower surface of the core layer, a core insulating layer having an upper surface and a lower surface, the upper surface of the core insulating layer coupled to the lower surface of the pre-preg layer, a return current reference layer disposed on the lower surface of the core insulator layer and high-speed signal traces disposed on the upper surface of the core insulating layer, each of the high speed signal traces disposed on a pedestal defined by a section of the pre-preg layer and the core insulating layer, each pedestal being separated by an air gap disposed between adjacent pedestals.
    Type: Grant
    Filed: October 25, 2007
    Date of Patent: December 27, 2011
    Assignee: International Business Machines Corporation
    Inventors: Moises Cases, Bradley D. Herrman, Kent B. Howieson, Erdem Matoglu, Bhyrav M. Mutnury, Pravin S. Patel, Nam H. Pham, Caleb J. Wesley
  • Publication number: 20110234238
    Abstract: A method for altering an impedance of a conductive pathway on a microelectronic package includes applying a magnetic field to the conductive pathway. The microelectronic package may be, for example, a printed circuit board. The method also includes controlling a magnitude of the magnetic field at the conductive pathway for altering the impedance of the conductive pathway. The magnetic field may be applied by, for example, an electromagnet or a permanent magnet. A magnetic field may also be applied for simulating crosstalk effects on a conductive pathway.
    Type: Application
    Filed: March 26, 2010
    Publication date: September 29, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Bradley D. Herrman, Bhyrav M. Mutnury, Terence Rodrigues
  • Patent number: 7956688
    Abstract: Embodiments of the invention include a common mode cancellation circuit and method for correcting signal skew in a differential circuit. According to one embodiment, an op amp circuit is used to correct the mismatch between transmission line lengths in the differential circuit. The CMCC can be embodied as an ASIC and added on to an existing differential signaling systems to correct and compensate for board wiring skew or other causes of phase misalignment. The result is restoration of the cross-over intersection of the plus and minus signals of the differential pair closer to the common voltage level point, as if the signals had been in phase.
    Type: Grant
    Filed: October 7, 2009
    Date of Patent: June 7, 2011
    Assignee: International Business Machines Corporation
    Inventors: Rubina F. Ahmed, Bradley D. Herrman, Pravin Patel, Peter R. Seidel
  • Publication number: 20110080973
    Abstract: Embodiments of the invention include a common mode cancellation circuit and method for correcting signal skew in a differential circuit. According to one embodiment, an op amp circuit is used to correct the mismatch between transmission line lengths in the differential circuit. The CMCC can be embodied as an ASIC and added on to an existing differential signaling systems to correct and compensate for board wiring skew or other causes of phase misalignment. The result is restoration of the cross-over intersection of the plus and minus signals of the differential pair closer to the common voltage level point, as if the signals had been in phase.
    Type: Application
    Filed: October 7, 2009
    Publication date: April 7, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Rubina F. Ahmed, Bradley D. Herrman, Pravin Patel, Peter R. Seidel
  • Patent number: 7813447
    Abstract: An apparatus, system, and method are disclosed for dynamic phase equalization in a communication channel. A transmitter history module stores a plurality of bits from a data stream that is transmitted through the communication channel. A transmitter detection module detects a pre-transition bit of a first value that is preceded in the data stream by at least one bit of the first value and followed by a transition bit with a second value. A driver module transmits the data stream by driving the communication channel. A transition module pre-drives the communication channel to the second voltage of the transition bit during a bit time interval of the pre-transition bit.
    Type: Grant
    Filed: November 15, 2006
    Date of Patent: October 12, 2010
    Assignee: International Business Machines Corporation
    Inventors: Daniel N. De Araujo, Moises Cases, Bradley D. Herrman, Erdem Matoglu, Bhyrav M. Mutnury, Pravin S. Patel, Nam H. Pham
  • Publication number: 20100231209
    Abstract: Testing an electrical component, the component including a printed circuit board (‘PCB’) with a number of traces, the traces organized in pairs with each trace of a pair carrying current in opposite directions and separated from one another by a substrate layer of the PCB, where testing of the electrical component includes: dynamically and iteratively until a present impedance for a pair of traces of the component is greater than a predetermined threshold impedance: increasing, by an impedance varying device at the behest of a testing device, magnetic field strength of a magnetic field applied to the pair of traces by the impedance varying device, including increasing the present impedance of the pair of traces; measuring, by the testing device, one or more operating parameters; and recording, by the testing device, the measurements of the operating parameters.
    Type: Application
    Filed: March 12, 2009
    Publication date: September 16, 2010
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Rubina F. Ahmed, Moises Cases, Bradley D. Herrman, Bhyrav M. Mutnury, Pravin Patel, Peter R. Seidel